Searched hist:"1 fa55b4e" (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/misc/mei/ |
| H A D | hw-me.h | 1fa55b4e Sun Aug 02 14:20:52 CDT 2015 Alexander Usyskin <alexander.usyskin@intel.com> mei: me: d0i3: enable d0i3 interrupts
D0i3 adds additional interrupt reason bit, therefore we add a variable
intr_source to save the interrupt causes for further dispatching.
The interrupt cause is saved in the irq quick handler to achieve
unified behavior for both MSI enabled and shared interrupt platforms.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1fa55b4e Sun Aug 02 14:20:52 CDT 2015 Alexander Usyskin <alexander.usyskin@intel.com> mei: me: d0i3: enable d0i3 interrupts
D0i3 adds additional interrupt reason bit, therefore we add a variable
intr_source to save the interrupt causes for further dispatching.
The interrupt cause is saved in the irq quick handler to achieve
unified behavior for both MSI enabled and shared interrupt platforms.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| H A D | hw-me-regs.h | 1fa55b4e Sun Aug 02 14:20:52 CDT 2015 Alexander Usyskin <alexander.usyskin@intel.com> mei: me: d0i3: enable d0i3 interrupts
D0i3 adds additional interrupt reason bit, therefore we add a variable
intr_source to save the interrupt causes for further dispatching.
The interrupt cause is saved in the irq quick handler to achieve
unified behavior for both MSI enabled and shared interrupt platforms.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1fa55b4e Sun Aug 02 14:20:52 CDT 2015 Alexander Usyskin <alexander.usyskin@intel.com> mei: me: d0i3: enable d0i3 interrupts
D0i3 adds additional interrupt reason bit, therefore we add a variable
intr_source to save the interrupt causes for further dispatching.
The interrupt cause is saved in the irq quick handler to achieve
unified behavior for both MSI enabled and shared interrupt platforms.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
| H A D | hw-me.c | 1fa55b4e Sun Aug 02 14:20:52 CDT 2015 Alexander Usyskin <alexander.usyskin@intel.com> mei: me: d0i3: enable d0i3 interrupts
D0i3 adds additional interrupt reason bit, therefore we add a variable
intr_source to save the interrupt causes for further dispatching.
The interrupt cause is saved in the irq quick handler to achieve
unified behavior for both MSI enabled and shared interrupt platforms.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1fa55b4e Sun Aug 02 14:20:52 CDT 2015 Alexander Usyskin <alexander.usyskin@intel.com> mei: me: d0i3: enable d0i3 interrupts
D0i3 adds additional interrupt reason bit, therefore we add a variable
intr_source to save the interrupt causes for further dispatching.
The interrupt cause is saved in the irq quick handler to achieve
unified behavior for both MSI enabled and shared interrupt platforms.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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| H A D | pci-me.c | 1fa55b4e Sun Aug 02 14:20:52 CDT 2015 Alexander Usyskin <alexander.usyskin@intel.com> mei: me: d0i3: enable d0i3 interrupts
D0i3 adds additional interrupt reason bit, therefore we add a variable
intr_source to save the interrupt causes for further dispatching.
The interrupt cause is saved in the irq quick handler to achieve
unified behavior for both MSI enabled and shared interrupt platforms.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1fa55b4e Sun Aug 02 14:20:52 CDT 2015 Alexander Usyskin <alexander.usyskin@intel.com> mei: me: d0i3: enable d0i3 interrupts
D0i3 adds additional interrupt reason bit, therefore we add a variable
intr_source to save the interrupt causes for further dispatching.
The interrupt cause is saved in the irq quick handler to achieve
unified behavior for both MSI enabled and shared interrupt platforms.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|