Searched hist:"1 a442fe0" (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/arch/sh/kernel/cpu/sh4a/ |
| H A D | smp-shx3.c | 1a442fe0 Fri Sep 21 05:16:05 CDT 2007 Paul Mundt <lethal@linux-sh.org> sh: Initial SH-X3 SMP support.
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
1a442fe0 Fri Sep 21 05:16:05 CDT 2007 Paul Mundt <lethal@linux-sh.org> sh: Initial SH-X3 SMP support.
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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| H A D | Makefile | 1a442fe0 Fri Sep 21 05:16:05 CDT 2007 Paul Mundt <lethal@linux-sh.org> sh: Initial SH-X3 SMP support.
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
1a442fe0 Fri Sep 21 05:16:05 CDT 2007 Paul Mundt <lethal@linux-sh.org> sh: Initial SH-X3 SMP support.
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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| /openbmc/linux/arch/sh/configs/ |
| H A D | shx3_defconfig | 1a442fe0 Fri Sep 21 05:16:05 CDT 2007 Paul Mundt <lethal@linux-sh.org> sh: Initial SH-X3 SMP support.
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
1a442fe0 Fri Sep 21 05:16:05 CDT 2007 Paul Mundt <lethal@linux-sh.org> sh: Initial SH-X3 SMP support.
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
| /openbmc/linux/arch/sh/mm/ |
| H A D | Kconfig | 1a442fe0 Fri Sep 21 05:16:05 CDT 2007 Paul Mundt <lethal@linux-sh.org> sh: Initial SH-X3 SMP support.
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
1a442fe0 Fri Sep 21 05:16:05 CDT 2007 Paul Mundt <lethal@linux-sh.org> sh: Initial SH-X3 SMP support.
This adds basic support for SH-X3 SMP (4 CPUs).
More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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