Searched hist:"11129 e8e" (Results 1 – 3 of 3) sorted by relevance
/openbmc/linux/arch/riscv/lib/ |
H A D | Makefile | 11129e8e Mon Sep 07 00:58:22 CDT 2020 Christoph Hellwig <hch@lst.de> riscv: use memcpy based uaccess for nommu again
This reverts commit adccfb1a805ea84d2db38eb53032533279bdaa97.
Now that the generic uaccess by mempcy code handles unaligned addresses the generic code can be used for all RISC-V CPUs.
Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com> 11129e8e Mon Sep 07 00:58:22 CDT 2020 Christoph Hellwig <hch@lst.de> riscv: use memcpy based uaccess for nommu again This reverts commit adccfb1a805ea84d2db38eb53032533279bdaa97. Now that the generic uaccess by mempcy code handles unaligned addresses the generic code can be used for all RISC-V CPUs. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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/openbmc/linux/arch/riscv/include/asm/ |
H A D | uaccess.h | 11129e8e Mon Sep 07 00:58:22 CDT 2020 Christoph Hellwig <hch@lst.de> riscv: use memcpy based uaccess for nommu again
This reverts commit adccfb1a805ea84d2db38eb53032533279bdaa97.
Now that the generic uaccess by mempcy code handles unaligned addresses the generic code can be used for all RISC-V CPUs.
Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com> 11129e8e Mon Sep 07 00:58:22 CDT 2020 Christoph Hellwig <hch@lst.de> riscv: use memcpy based uaccess for nommu again This reverts commit adccfb1a805ea84d2db38eb53032533279bdaa97. Now that the generic uaccess by mempcy code handles unaligned addresses the generic code can be used for all RISC-V CPUs. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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/openbmc/linux/arch/riscv/ |
H A D | Kconfig | 11129e8e Mon Sep 07 00:58:22 CDT 2020 Christoph Hellwig <hch@lst.de> riscv: use memcpy based uaccess for nommu again
This reverts commit adccfb1a805ea84d2db38eb53032533279bdaa97.
Now that the generic uaccess by mempcy code handles unaligned addresses the generic code can be used for all RISC-V CPUs.
Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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