Searched hist:"0 fabe43f" (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/drivers/pinctrl/meson/ |
| H A D | pinctrl-meson-axg-pmx.c | 0fabe43f Mon Nov 20 04:08:24 CST 2017 Xingyu Chen <xingyu.chen@amlogic.com> pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series,
which use continuous 4-bit register to select function for each pin.
In order to support this, a new pinmux operations "meson_axg_pmx_ops"
has been added.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
0fabe43f Mon Nov 20 04:08:24 CST 2017 Xingyu Chen <xingyu.chen@amlogic.com> pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series,
which use continuous 4-bit register to select function for each pin.
In order to support this, a new pinmux operations "meson_axg_pmx_ops"
has been added.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | pinctrl-meson-axg-pmx.h | 0fabe43f Mon Nov 20 04:08:24 CST 2017 Xingyu Chen <xingyu.chen@amlogic.com> pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series,
which use continuous 4-bit register to select function for each pin.
In order to support this, a new pinmux operations "meson_axg_pmx_ops"
has been added.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
0fabe43f Mon Nov 20 04:08:24 CST 2017 Xingyu Chen <xingyu.chen@amlogic.com> pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series,
which use continuous 4-bit register to select function for each pin.
In order to support this, a new pinmux operations "meson_axg_pmx_ops"
has been added.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | Kconfig | 0fabe43f Mon Nov 20 04:08:24 CST 2017 Xingyu Chen <xingyu.chen@amlogic.com> pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series,
which use continuous 4-bit register to select function for each pin.
In order to support this, a new pinmux operations "meson_axg_pmx_ops"
has been added.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
0fabe43f Mon Nov 20 04:08:24 CST 2017 Xingyu Chen <xingyu.chen@amlogic.com> pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series,
which use continuous 4-bit register to select function for each pin.
In order to support this, a new pinmux operations "meson_axg_pmx_ops"
has been added.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | Makefile | 0fabe43f Mon Nov 20 04:08:24 CST 2017 Xingyu Chen <xingyu.chen@amlogic.com> pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series,
which use continuous 4-bit register to select function for each pin.
In order to support this, a new pinmux operations "meson_axg_pmx_ops"
has been added.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
0fabe43f Mon Nov 20 04:08:24 CST 2017 Xingyu Chen <xingyu.chen@amlogic.com> pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series,
which use continuous 4-bit register to select function for each pin.
In order to support this, a new pinmux operations "meson_axg_pmx_ops"
has been added.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | pinctrl-meson.h | 0fabe43f Mon Nov 20 04:08:24 CST 2017 Xingyu Chen <xingyu.chen@amlogic.com> pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series,
which use continuous 4-bit register to select function for each pin.
In order to support this, a new pinmux operations "meson_axg_pmx_ops"
has been added.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
0fabe43f Mon Nov 20 04:08:24 CST 2017 Xingyu Chen <xingyu.chen@amlogic.com> pinctrl: meson-axg: Introduce a pinctrl pinmux ops for Meson-AXG SoC
The pin controller has been updated in the Amlogic Meson AXG series,
which use continuous 4-bit register to select function for each pin.
In order to support this, a new pinmux operations "meson_axg_pmx_ops"
has been added.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|