Searched hist:"0 cde3e9f" (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/sound/soc/sof/intel/ |
| H A D | Makefile | 0cde3e9f Fri Nov 27 10:40:22 CST 2020 Fred Oh <fred.oh@linux.intel.com> ASoC: SOF: Intel: hda: add sof_icl_ops for ICL platforms
Separate the dsp ops for ICL ops to specify the use of ICCMAX
FW boot sequence in the run op. All other ops are identical with TGL
except post_fw_run. The recommended HW programming sequence for ICL
is to power up core 3 and keep it in stall if HPRO is enabled.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20201127164022.2498406-6-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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| H A D | icl.c | 0cde3e9f Fri Nov 27 10:40:22 CST 2020 Fred Oh <fred.oh@linux.intel.com> ASoC: SOF: Intel: hda: add sof_icl_ops for ICL platforms
Separate the dsp ops for ICL ops to specify the use of ICCMAX
FW boot sequence in the run op. All other ops are identical with TGL
except post_fw_run. The recommended HW programming sequence for ICL
is to power up core 3 and keep it in stall if HPRO is enabled.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20201127164022.2498406-6-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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| H A D | cnl.c | 0cde3e9f Fri Nov 27 10:40:22 CST 2020 Fred Oh <fred.oh@linux.intel.com> ASoC: SOF: Intel: hda: add sof_icl_ops for ICL platforms
Separate the dsp ops for ICL ops to specify the use of ICCMAX
FW boot sequence in the run op. All other ops are identical with TGL
except post_fw_run. The recommended HW programming sequence for ICL
is to power up core 3 and keep it in stall if HPRO is enabled.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20201127164022.2498406-6-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | hda-loader.c | 0cde3e9f Fri Nov 27 10:40:22 CST 2020 Fred Oh <fred.oh@linux.intel.com> ASoC: SOF: Intel: hda: add sof_icl_ops for ICL platforms
Separate the dsp ops for ICL ops to specify the use of ICCMAX
FW boot sequence in the run op. All other ops are identical with TGL
except post_fw_run. The recommended HW programming sequence for ICL
is to power up core 3 and keep it in stall if HPRO is enabled.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20201127164022.2498406-6-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | hda.h | 0cde3e9f Fri Nov 27 10:40:22 CST 2020 Fred Oh <fred.oh@linux.intel.com> ASoC: SOF: Intel: hda: add sof_icl_ops for ICL platforms
Separate the dsp ops for ICL ops to specify the use of ICCMAX
FW boot sequence in the run op. All other ops are identical with TGL
except post_fw_run. The recommended HW programming sequence for ICL
is to power up core 3 and keep it in stall if HPRO is enabled.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20201127164022.2498406-6-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| /openbmc/linux/sound/soc/sof/ |
| H A D | sof-pci-dev.c | 0cde3e9f Fri Nov 27 10:40:22 CST 2020 Fred Oh <fred.oh@linux.intel.com> ASoC: SOF: Intel: hda: add sof_icl_ops for ICL platforms
Separate the dsp ops for ICL ops to specify the use of ICCMAX
FW boot sequence in the run op. All other ops are identical with TGL
except post_fw_run. The recommended HW programming sequence for ICL
is to power up core 3 and keep it in stall if HPRO is enabled.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Link: https://lore.kernel.org/r/20201127164022.2498406-6-kai.vehmanen@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|