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| /openbmc/linux/arch/arm/mach-pxa/ |
| H A D | irq.c | 0c1049dc Fri Jul 06 15:15:00 CDT 2018 Daniel Mack <daniel@zonque.org> ARM: pxa: irq: fix handling of ICMR registers in suspend/resume
PXA3xx platforms have 56 interrupts that are stored in two ICMR
registers. The code in pxa_irq_suspend() and pxa_irq_resume() however
does a simple division by 32 which only leads to one register being
saved at suspend and restored at resume time. The NAND interrupt
setting, for instance, is lost.
Fix this by using DIV_ROUND_UP() instead.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
0c1049dc Fri Jul 06 15:15:00 CDT 2018 Daniel Mack <daniel@zonque.org> ARM: pxa: irq: fix handling of ICMR registers in suspend/resume
PXA3xx platforms have 56 interrupts that are stored in two ICMR
registers. The code in pxa_irq_suspend() and pxa_irq_resume() however
does a simple division by 32 which only leads to one register being
saved at suspend and restored at resume time. The NAND interrupt
setting, for instance, is lost.
Fix this by using DIV_ROUND_UP() instead.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
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