Searched hist:"0968 a619" (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/arm64/include/asm/ |
| H A D | arch_gicv3.h | 0968a619 Wed Nov 02 06:54:06 CDT 2016 Vladimir Murzin <vladimir.murzin@arm.com> irqchip/gic-v3-its: Specialise readq and writeq accesses
readq and writeq type of assessors are not supported in AArch32, so we
need to specialise them and glue later with series of 32-bit accesses
on AArch32 side.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
0968a619 Wed Nov 02 06:54:06 CDT 2016 Vladimir Murzin <vladimir.murzin@arm.com> irqchip/gic-v3-its: Specialise readq and writeq accesses
readq and writeq type of assessors are not supported in AArch32, so we
need to specialise them and glue later with series of 32-bit accesses
on AArch32 side.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
|
| /openbmc/linux/drivers/irqchip/ |
| H A D | irq-gic-v3-its.c | 0968a619 Wed Nov 02 06:54:06 CDT 2016 Vladimir Murzin <vladimir.murzin@arm.com> irqchip/gic-v3-its: Specialise readq and writeq accesses
readq and writeq type of assessors are not supported in AArch32, so we
need to specialise them and glue later with series of 32-bit accesses
on AArch32 side.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
0968a619 Wed Nov 02 06:54:06 CDT 2016 Vladimir Murzin <vladimir.murzin@arm.com> irqchip/gic-v3-its: Specialise readq and writeq accesses
readq and writeq type of assessors are not supported in AArch32, so we
need to specialise them and glue later with series of 32-bit accesses
on AArch32 side.
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
|