Searched hist:"0760 e8fa" (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/iommu/ |
| H A D | nvidia,tegra30-smmu.txt | 0760e8fa Mon Jun 25 06:23:55 CDT 2012 Hiroshi Doyu <hdoyu@nvidia.com> iommu/tegra: smmu: Add device tree support for SMMU
The necessary info is expected to pass from DT.
For more precise resource reservation, there shouldn't be any
overlapping of register range between SMMU and MC. SMMU register
offset needs to be calculated correctly, based on its register bank.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
0760e8fa Mon Jun 25 06:23:55 CDT 2012 Hiroshi Doyu <hdoyu@nvidia.com> iommu/tegra: smmu: Add device tree support for SMMU
The necessary info is expected to pass from DT.
For more precise resource reservation, there shouldn't be any
overlapping of register range between SMMU and MC. SMMU register
offset needs to be calculated correctly, based on its register bank.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
|
| /openbmc/linux/drivers/iommu/ |
| H A D | tegra-smmu.c | 0760e8fa Mon Jun 25 06:23:55 CDT 2012 Hiroshi Doyu <hdoyu@nvidia.com> iommu/tegra: smmu: Add device tree support for SMMU
The necessary info is expected to pass from DT.
For more precise resource reservation, there shouldn't be any
overlapping of register range between SMMU and MC. SMMU register
offset needs to be calculated correctly, based on its register bank.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
0760e8fa Mon Jun 25 06:23:55 CDT 2012 Hiroshi Doyu <hdoyu@nvidia.com> iommu/tegra: smmu: Add device tree support for SMMU
The necessary info is expected to pass from DT.
For more precise resource reservation, there shouldn't be any
overlapping of register range between SMMU and MC. SMMU register
offset needs to be calculated correctly, based on its register bank.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
|
| H A D | Kconfig | 0760e8fa Mon Jun 25 06:23:55 CDT 2012 Hiroshi Doyu <hdoyu@nvidia.com> iommu/tegra: smmu: Add device tree support for SMMU
The necessary info is expected to pass from DT.
For more precise resource reservation, there shouldn't be any
overlapping of register range between SMMU and MC. SMMU register
offset needs to be calculated correctly, based on its register bank.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
0760e8fa Mon Jun 25 06:23:55 CDT 2012 Hiroshi Doyu <hdoyu@nvidia.com> iommu/tegra: smmu: Add device tree support for SMMU
The necessary info is expected to pass from DT.
For more precise resource reservation, there shouldn't be any
overlapping of register range between SMMU and MC. SMMU register
offset needs to be calculated correctly, based on its register bank.
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
|