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H A D | k3-j721e-beagleboneai64.dts | 00ae4c39 Wed Aug 09 13:01:45 CDT 2023 Andrew Davis <afd@ti.com> arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
C6x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with both mboxes and memory-region information.
As theses only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the C6x DSP nodes in the dtsi files and only enable the ones that are given the required mboxes and memory-region on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Hari Nagalla <hnagalla@ti.com> Tested-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230809180145.53158-3-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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H A D | k3-j721e-sk.dts | 00ae4c39 Wed Aug 09 13:01:45 CDT 2023 Andrew Davis <afd@ti.com> arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
C6x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with both mboxes and memory-region information.
As theses only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the C6x DSP nodes in the dtsi files and only enable the ones that are given the required mboxes and memory-region on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Hari Nagalla <hnagalla@ti.com> Tested-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230809180145.53158-3-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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H A D | k3-j721e-som-p0.dtsi | 00ae4c39 Wed Aug 09 13:01:45 CDT 2023 Andrew Davis <afd@ti.com> arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
C6x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with both mboxes and memory-region information.
As theses only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the C6x DSP nodes in the dtsi files and only enable the ones that are given the required mboxes and memory-region on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Hari Nagalla <hnagalla@ti.com> Tested-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230809180145.53158-3-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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H A D | k3-j721e-main.dtsi | 00ae4c39 Wed Aug 09 13:01:45 CDT 2023 Andrew Davis <afd@ti.com> arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
C6x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with both mboxes and memory-region information.
As theses only known about at the board integration level, these nodes should only be enabled when provided with this information.
Disable the C6x DSP nodes in the dtsi files and only enable the ones that are given the required mboxes and memory-region on a given board.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Hari Nagalla <hnagalla@ti.com> Tested-by: Udit Kumar <u-kumar1@ti.com> Link: https://lore.kernel.org/r/20230809180145.53158-3-afd@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
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