/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | nvidia,tegra20-usb-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra20-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Osipenko <digetx@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Thierry Reding <thierry.reding@gmail.com> 17 - items: 18 - enum: 19 - nvidia,tegra124-usb-phy [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | tegra30.dtsi | 1 #include <dt-bindings/clock/tegra30-car.h> 2 #include <dt-bindings/gpio/tegra-gpio.h> 3 #include <dt-bindings/memory/tegra30-mc.h> 4 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 interrupt-parent = <&lic>; 13 pcie-controller@00003000 { 14 compatible = "nvidia,tegra30-pcie"; 19 reg-names = "pads", "afi", "cs"; 22 interrupt-names = "intr", "msi"; [all …]
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H A D | tegra124.dtsi | 1 #include <dt-bindings/clock/tegra124-car.h> 2 #include <dt-bindings/gpio/tegra-gpio.h> 3 #include <dt-bindings/memory/tegra124-mc.h> 4 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/reset/tegra124-car.h> 8 #include <dt-bindings/thermal/tegra124-soctherm.h> 14 interrupt-parent = <&lic>; 17 pcie-controller@01003000 { [all …]
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H A D | tegra114.dtsi | 1 #include <dt-bindings/clock/tegra114-car.h> 2 #include <dt-bindings/gpio/tegra-gpio.h> 3 #include <dt-bindings/memory/tegra114-mc.h> 4 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 interrupt-parent = <&lic>; 14 compatible = "nvidia,tegra114-host1x", "simple-bus"; 20 reset-names = "host1x"; 22 #address-cells = <1>; 23 #size-cells = <1>; [all …]
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H A D | tegra210.dtsi | 1 #include <dt-bindings/clock/tegra210-car.h> 2 #include <dt-bindings/gpio/tegra-gpio.h> 3 #include <dt-bindings/memory/tegra210-mc.h> 4 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> 10 interrupt-parent = <&lic>; 11 #address-cells = <2>; 12 #size-cells = <2>; 14 pcie-controller@01003000 { [all …]
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H A D | tegra20.dtsi | 1 #include <dt-bindings/clock/tegra20-car.h> 2 #include <dt-bindings/gpio/tegra-gpio.h> 3 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 interrupt-parent = <&lic>; 13 compatible = "nvidia,tegra20-host1x", "simple-bus"; 19 reset-names = "host1x"; 21 #address-cells = <1>; 22 #size-cells = <1>; 27 compatible = "nvidia,tegra20-mpe"; [all …]
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/openbmc/linux/sound/soc/fsl/ |
H A D | fsl_xcvr.c | 1 // SPDX-License-Identifier: GPL-2.0 18 #include "imx-pcm.h" 61 * HDMI2.1 spec defines 6- and 12-channels layout for one bit audio 98 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_arc_mode_put() local 99 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in fsl_xcvr_arc_mode_put() 100 unsigned int *item = ucontrol->value.enumerated.item; in fsl_xcvr_arc_mode_put() 102 xcvr->arc_mode = snd_soc_enum_item_to_val(e, item[0]); in fsl_xcvr_arc_mode_put() 111 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_arc_mode_get() local 113 ucontrol->value.enumerated.item[0] = xcvr->arc_mode; in fsl_xcvr_arc_mode_get() 133 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; in fsl_xcvr_type_capds_bytes_info() [all …]
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra30.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra30-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra30-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/soc/tegra-pmc.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra30-peripherals-opp.dtsi" 14 interrupt-parent = <&lic>; [all …]
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H A D | tegra124.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra124-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra124-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/reset/tegra124-car.h> 8 #include <dt-bindings/thermal/tegra124-soctherm.h> 9 #include <dt-bindings/soc/tegra-pmc.h> 11 #include "tegra124-peripherals-opp.dtsi" [all …]
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H A D | tegra114-tn7.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 15 linux,initrd-start = <0x82000000>; 16 linux,initrd-end = <0x82800000>; 24 trusted-foundations { 25 compatible = "tlm,trusted-foundations"; 26 tlm,version-major = <2>; 27 tlm,version-minor = <8>; 40 avdd-dsi-csi-supply = <&vdd_1v2_ap>; [all …]
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H A D | tegra114.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra114-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra114-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/soc/tegra-pmc.h> 11 interrupt-parent = <&lic>; 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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H A D | tegra30-asus-tf201.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra30-asus-transformer-common.dtsi" 5 #include "tegra30-asus-lvds-display.dtsi" 19 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 27 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 35 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 43 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 51 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 57 /* Azurewave AW-NH615 BCM4329B1 */ [all …]
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H A D | tegra114-roth.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 15 linux,initrd-start = <0x82000000>; 16 linux,initrd-end = <0x82800000>; 24 trusted-foundations { 25 compatible = "tlm,trusted-foundations"; 26 tlm,version-major = <2>; 27 tlm,version-minor = <8>; 40 avdd-dsi-csi-supply = <&vdd_1v2_ap>; [all …]
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H A D | tegra20.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra20-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra20-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/soc/tegra-pmc.h> 9 #include "tegra20-peripherals-opp.dtsi" 13 interrupt-parent = <&lic>; 14 #address-cells = <1>; [all …]
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H A D | tegra20-acer-a500-picasso.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/atmel-maxtouch.h> 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra20-cpu-opp.dtsi" 11 #include "tegra20-cpu-opp-microvolt.dtsi" 32 * pre-existing /chosen node to be available to insert the 41 reserved-memory { [all …]
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H A D | tegra20-asus-tf101.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/atmel-maxtouch.h> 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra20-cpu-opp.dtsi" 11 #include "tegra20-cpu-opp-microvolt.dtsi" 16 chassis-type = "convertible"; 33 * pre-existing /chosen node to be available to insert the [all …]
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/openbmc/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra132.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra124-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra124-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/thermal/tegra124-soctherm.h> 9 #include <dt-bindings/soc/tegra-pmc.h> 11 #include "tegra132-peripherals-opp.dtsi" [all …]
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H A D | tegra210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra210-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra210-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 7 #include <dt-bindings/reset/tegra210-car.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/thermal/tegra124-soctherm.h> 10 #include <dt-bindings/soc/tegra-pmc.h> [all …]
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/openbmc/linux/drivers/scsi/isci/ |
H A D | host.c | 7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 100 * NORMALIZE_PUT_POINTER() - 110 * NORMALIZE_EVENT_POINTER() - 122 * NORMALIZE_GET_POINTER() - 131 * NORMALIZE_GET_POINTER_CYCLE_BIT() - 137 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT)) 140 * COMPLETION_QUEUE_CYCLE_BIT() - 152 sm->initial_state_id = initial_state; in sci_init_sm() [all …]
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/openbmc/linux/drivers/usb/phy/ |
H A D | phy-tegra-usb.c | 1 // SPDX-License-Identifier: GPL-2.0 223 void __iomem *base = phy->regs; in set_pts() 226 if (phy->soc_config->has_hostpc) { in set_pts() 242 void __iomem *base = phy->regs; in set_phcd() 245 if (phy->soc_config->has_hostpc) { in set_phcd() 266 ret = clk_prepare_enable(phy->pad_clk); in utmip_pad_open() 268 dev_err(phy->u_phy.dev, in utmip_pad_open() 269 "Failed to enable UTMI-pads clock: %d\n", ret); in utmip_pad_open() 275 ret = reset_control_deassert(phy->pad_rst); in utmip_pad_open() 277 dev_err(phy->u_phy.dev, in utmip_pad_open() [all …]
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/openbmc/linux/drivers/net/ethernet/amd/pds_core/ |
H A D | adminq.c | 1 // SPDX-License-Identifier: GPL-2.0 16 struct pdsc *pdsc = qcq->pdsc; in pdsc_process_notifyq() 17 struct pdsc_cq *cq = &qcq->cq; in pdsc_process_notifyq() 22 cq_info = &cq->info[cq->tail_idx]; in pdsc_process_notifyq() 23 comp = cq_info->comp; in pdsc_process_notifyq() 24 eid = le64_to_cpu(comp->event.eid); in pdsc_process_notifyq() 25 while (eid > pdsc->last_eid) { in pdsc_process_notifyq() 26 u16 ecode = le16_to_cpu(comp->event.ecode); in pdsc_process_notifyq() 30 dev_info(pdsc->dev, "NotifyQ LINK_CHANGE ecode %d eid %lld\n", in pdsc_process_notifyq() 36 dev_info(pdsc->dev, "NotifyQ RESET ecode %d eid %lld\n", in pdsc_process_notifyq() [all …]
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/openbmc/linux/drivers/net/ethernet/dec/tulip/ |
H A D | media.c | 5 Written/copyright 1994-2001 by Donald Becker. 21 met by back-to-back PCI I/O cycles, but we insert a delay to avoid 25 /* Read and write the MII registers using software-generated serial 41 Read and write the MII registers using software-generated serial 43 See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions") 53 void __iomem *ioaddr = tp->base_addr; in tulip_mdio_read() 60 if (tp->chip_id == COMET && phy_id == 30) { in tulip_mdio_read() 66 spin_lock_irqsave(&tp->mii_lock, flags); in tulip_mdio_read() 67 if (tp->chip_id == LC82C168) { in tulip_mdio_read() 71 for (i = 1000; i >= 0; --i) { in tulip_mdio_read() [all …]
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H A D | tulip_core.c | 1 /* tulip_core.c: A DEC 21x4x-family ethernet driver for Linux. 4 Written/copyright 1994-2001 by Donald Becker. 33 /* A few user-configurable values. */ 39 /* Used to pass the full-duplex flag, etc. */ 47 "10baseT-FDX", "100baseTx-FDX", "100baseT4", "100baseFx", 48 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII", 49 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4", 50 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19", 54 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */ 73 ToDo: Non-Intel setting could be better. [all …]
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/openbmc/linux/drivers/net/ethernet/3com/ |
H A D | 3c515.c | 2 Written 1997-1998 by Donald Becker. 15 2000/2/2- Added support for kernel-level ISAPnP 19 2001/11/17 - Added ethtool support (jgarzik) 21 2002/10/28 - Locking updates for 2.5 (alan@lxorguk.ukuu.org.uk) 30 /* Set the copy breakpoint for the copy-only-tiny-frames scheme. 34 /* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */ 40 /* Enable the automatic media selection code -- usually set. */ 44 programmed-I/O for Vortex cards. Full-bus-master transfers are always 86 /* Put out somewhat more debugging messages. (0 - no msg, 1 minimal msgs). */ 88 /* Some values here only for performance evaluation and path-coverage [all …]
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/openbmc/linux/drivers/scsi/bfa/ |
H A D | bfa_ioc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc. 4 * Copyright (c) 2014- QLogic Corporation. 8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter. 31 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->ioc_timer, \ 33 #define bfa_ioc_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->ioc_timer) 36 bfa_timer_begin((__ioc)->timer_mod, &(__ioc)->hb_timer, \ 38 #define bfa_hb_timer_stop(__ioc) bfa_timer_stop(&(__ioc)->hb_timer) 55 ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc)) 57 ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc)) [all …]
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