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/openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/
H A Djz4780.h36 #define GPIO_PXPIN(n) (0x00 + (n) * 0x100)
37 #define GPIO_PXINT(n) (0x10 + (n) * 0x100)
38 #define GPIO_PXINTS(n) (0x14 + (n) * 0x100)
39 #define GPIO_PXINTC(n) (0x18 + (n) * 0x100)
40 #define GPIO_PXMASK(n) (0x20 + (n) * 0x100)
41 #define GPIO_PXMASKS(n) (0x24 + (n) * 0x100)
42 #define GPIO_PXMASKC(n) (0x28 + (n) * 0x100)
43 #define GPIO_PXPAT1(n) (0x30 + (n) * 0x100)
44 #define GPIO_PXPAT1S(n) (0x34 + (n) * 0x100)
45 #define GPIO_PXPAT1C(n) (0x38 + (n) * 0x100)
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmscc,vsc7514-switch.yaml144 <0x1080000 0x100>,
146 <0x11e0000 0x100>,
147 <0x11f0000 0x100>,
148 <0x1200000 0x100>,
149 <0x1210000 0x100>,
150 <0x1220000 0x100>,
151 <0x1230000 0x100>,
152 <0x1240000 0x100>,
153 <0x1250000 0x100>,
154 <0x1260000 0x100>,
[all …]
/openbmc/linux/drivers/gpu/drm/radeon/
H A Drv770.c188 0x5448, 0xffffffff, 0x100,
189 0x55e4, 0xffffffff, 0x100,
190 0x160c, 0xffffffff, 0x100,
191 0x5644, 0xffffffff, 0x100,
192 0xc164, 0xffffffff, 0x100,
193 0x8a18, 0xffffffff, 0x100,
196 0x9144, 0xffffffff, 0x100,
198 0x9a50, 0xffffffff, 0x100,
200 0x9a50, 0xffffffff, 0x100,
202 0x9a50, 0xffffffff, 0x100,
[all …]
/openbmc/linux/sound/soc/sh/rcar/
H A Dgen.c392 RSND_GEN_M_REG(CTU_SWRSR, 0x500, 0x100), in rsnd_gen2_probe()
393 RSND_GEN_M_REG(CTU_CTUIR, 0x504, 0x100), in rsnd_gen2_probe()
394 RSND_GEN_M_REG(CTU_ADINR, 0x508, 0x100), in rsnd_gen2_probe()
395 RSND_GEN_M_REG(CTU_CPMDR, 0x510, 0x100), in rsnd_gen2_probe()
396 RSND_GEN_M_REG(CTU_SCMDR, 0x514, 0x100), in rsnd_gen2_probe()
397 RSND_GEN_M_REG(CTU_SV00R, 0x518, 0x100), in rsnd_gen2_probe()
398 RSND_GEN_M_REG(CTU_SV01R, 0x51c, 0x100), in rsnd_gen2_probe()
399 RSND_GEN_M_REG(CTU_SV02R, 0x520, 0x100), in rsnd_gen2_probe()
400 RSND_GEN_M_REG(CTU_SV03R, 0x524, 0x100), in rsnd_gen2_probe()
401 RSND_GEN_M_REG(CTU_SV04R, 0x528, 0x100), in rsnd_gen2_probe()
[all …]
/openbmc/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_gpu_state.h398 REG_A6XX_CP_DRAW_STATE_DATA, 0x100, NULL },
417 DEBUGBUS(A6XX_DBGBUS_CP, 0x100),
418 DEBUGBUS(A6XX_DBGBUS_RBBM, 0x100),
419 DEBUGBUS(A6XX_DBGBUS_HLSQ, 0x100),
420 DEBUGBUS(A6XX_DBGBUS_UCHE, 0x100),
421 DEBUGBUS(A6XX_DBGBUS_DPM, 0x100),
422 DEBUGBUS(A6XX_DBGBUS_TESS, 0x100),
423 DEBUGBUS(A6XX_DBGBUS_PC, 0x100),
424 DEBUGBUS(A6XX_DBGBUS_VFDP, 0x100),
425 DEBUGBUS(A6XX_DBGBUS_VPC, 0x100),
[all …]
/openbmc/linux/arch/arm64/boot/dts/nuvoton/
H A Dma35d1.dtsi93 reg = <0x00000000 0x40460200 0x0 0x100>;
100 reg = <0x0 0x40700000 0x0 0x100>;
108 reg = <0x0 0x40710000 0x0 0x100>;
116 reg = <0x0 0x40720000 0x0 0x100>;
124 reg = <0x0 0x40730000 0x0 0x100>;
132 reg = <0x0 0x40740000 0x0 0x100>;
140 reg = <0x0 0x40750000 0x0 0x100>;
148 reg = <0x0 0x40760000 0x0 0x100>;
156 reg = <0x0 0x40770000 0x0 0x100>;
164 reg = <0x0 0x40780000 0x0 0x100>;
[all …]
/openbmc/linux/drivers/net/ethernet/intel/igbvf/
H A Dregs.h27 #define E1000_RDBAL(_n) ((_n) < 4 ? (0x02800 + ((_n) * 0x100)) : \
29 #define E1000_RDBAH(_n) ((_n) < 4 ? (0x02804 + ((_n) * 0x100)) : \
31 #define E1000_RDLEN(_n) ((_n) < 4 ? (0x02808 + ((_n) * 0x100)) : \
33 #define E1000_SRRCTL(_n) ((_n) < 4 ? (0x0280C + ((_n) * 0x100)) : \
35 #define E1000_RDH(_n) ((_n) < 4 ? (0x02810 + ((_n) * 0x100)) : \
37 #define E1000_RDT(_n) ((_n) < 4 ? (0x02818 + ((_n) * 0x100)) : \
39 #define E1000_RXDCTL(_n) ((_n) < 4 ? (0x02828 + ((_n) * 0x100)) : \
41 #define E1000_TDBAL(_n) ((_n) < 4 ? (0x03800 + ((_n) * 0x100)) : \
43 #define E1000_TDBAH(_n) ((_n) < 4 ? (0x03804 + ((_n) * 0x100)) : \
45 #define E1000_TDLEN(_n) ((_n) < 4 ? (0x03808 + ((_n) * 0x100)) : \
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dmpc5121.dtsi111 reg = <0xc00 0x100>;
117 reg = <0x900 0x100>;
123 reg = <0xa00 0x100>;
130 reg = <0xe00 0x100>;
136 reg = <0xf00 0x100>;
145 reg = <0x1000 0x100>;
151 reg = <0x1100 0x100>;
181 reg = <0x1500 0x100>;
227 reg = <0x2000 0x100>;
235 reg = <0x2100 0x100>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,pru-rproc.yaml132 <0x22400 0x100>;
141 <0x24400 0x100>;
170 <0x22000 0x100>,
171 <0x22400 0x100>;
179 <0x23000 0x100>,
180 <0x23400 0x100>;
188 <0x25000 0x100>,
189 <0x25400 0x100>;
197 <0x24000 0x100>,
198 <0x24400 0x100>;
[all …]
/openbmc/linux/arch/mips/boot/dts/mscc/
H A Docelot.dtsi85 reg = <0x100400 0x100>, <0x198 0x8>;
111 reg = <0x101000 0x100>, <0x3c 0x18>;
122 <0x1080000 0x100>,
124 <0x11e0000 0x100>,
125 <0x11f0000 0x100>,
126 <0x1200000 0x100>,
127 <0x1210000 0x100>,
128 <0x1220000 0x100>,
129 <0x1230000 0x100>,
130 <0x1240000 0x100>,
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dexynos54xx.dtsi46 reg = <0x12D10000 0x100>;
55 reg = <0x12CA0000 0x100>;
63 reg = <0x12CB0000 0x100>;
71 reg = <0x12CC0000 0x100>;
79 reg = <0x12CD0000 0x100>;
87 reg = <0x12E00000 0x100>;
95 reg = <0x12E10000 0x100>;
103 reg = <0x12E20000 0x100>;
109 reg = <0x03830000 0x100>;
144 reg = <0x14640000 0x100>;
[all …]
H A Dsocfpga_stratix10.dtsi130 reg = <0xffc03200 0x100>;
151 reg = <0xffc03300 0x100>;
172 reg = <0xffc02800 0x100>;
183 reg = <0xffc02900 0x100>;
194 reg = <0xffc02a00 0x100>;
205 reg = <0xffc02b00 0x100>;
216 reg = <0xffc02c00 0x100>;
291 reg = <0xffc03000 0x100>;
297 reg = <0xffc03100 0x100>;
303 reg = <0xffd00000 0x100>;
[all …]
H A Dexynos5.dtsi51 reg = <0x12C60000 0x100>;
59 reg = <0x12C70000 0x100>;
67 reg = <0x12C80000 0x100>;
75 reg = <0x12C90000 0x100>;
124 reg = <0x12110000 0x100>;
130 reg = <0x12130000 0x100>;
160 reg = <0x12100000 0x100>;
198 reg = <0x12C00000 0x100>;
205 reg = <0x12C10000 0x100>;
212 reg = <0x12C20000 0x100>;
[all …]
/openbmc/linux/arch/mips/include/asm/mach-ralink/
H A Drt3883.h45 #define RT3883_SYSC_SIZE 0x100
46 #define RT3883_TIMER_SIZE 0x100
47 #define RT3883_INTC_SIZE 0x100
48 #define RT3883_MEMC_SIZE 0x100
49 #define RT3883_UART0_SIZE 0x100
50 #define RT3883_UART1_SIZE 0x100
51 #define RT3883_PIO_SIZE 0x100
52 #define RT3883_FSCC_SIZE 0x100
54 #define RT3883_I2C_SIZE 0x100
55 #define RT3883_I2S_SIZE 0x100
[all …]
/openbmc/u-boot/arch/mips/dts/
H A Dmscc,ocelot.dtsi122 <0x1080000 0x100>, /* VTSS_TO_DEVCPU_QS */
124 <0x11e0000 0x100>, /* VTSS_TO_DEV_0 */
125 <0x11f0000 0x100>, /* VTSS_TO_DEV_1 */
126 <0x1200000 0x100>, /* VTSS_TO_DEV_2 */
127 <0x1210000 0x100>, /* VTSS_TO_DEV_3 */
128 <0x1220000 0x100>, /* VTSS_TO_DEV_4 */
129 <0x1230000 0x100>, /* VTSS_TO_DEV_5 */
130 <0x1240000 0x100>, /* VTSS_TO_DEV_6 */
131 <0x1250000 0x100>, /* VTSS_TO_DEV_7 */
132 <0x1260000 0x100>, /* VTSS_TO_DEV_8 */
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5.dtsi40 reg = <0x10000000 0x100>;
107 reg = <0x12c00000 0x100>;
113 reg = <0x12c10000 0x100>;
119 reg = <0x12c20000 0x100>;
125 reg = <0x12c30000 0x100>;
131 reg = <0x12c60000 0x100>;
141 reg = <0x12c70000 0x100>;
151 reg = <0x12c80000 0x100>;
161 reg = <0x12c90000 0x100>;
171 reg = <0x12dd0000 0x100>;
[all …]
/openbmc/qemu/hw/net/
H A Digb_regs.h536 #define E1000_RDBAL_A(_n) (0x02800 + (0x100 * (_n)))
540 #define E1000_RDBAH_A(_n) (0x02804 + (0x100 * (_n)))
544 #define E1000_RDLEN_A(_n) (0x02808 + (0x100 * (_n)))
548 #define E1000_SRRCTL_A(_n) (0x0280C + (0x100 * (_n)))
552 #define E1000_RDH_A(_n) (0x02810 + (0x100 * (_n)))
556 #define E1000_RXCTL_A(_n) (0x02814 + (0x100 * (_n)))
560 #define E1000_RDT_A(_n) (0x02818 + (0x100 * (_n)))
564 #define E1000_RXDCTL_A(_n) (0x02828 + (0x100 * (_n)))
567 #define E1000_RQDPC_A(_n) (0x02830 + (0x100 * (_n)))
573 #define E1000_TDBAL_A(_n) (0x03800 + (0x100 * (_n)))
[all …]
/openbmc/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex5.dtsi44 reg = <0x100>;
152 reg = <0x10c02800 0x100>;
163 reg = <0x10c02900 0x100>;
174 reg = <0x10c02a00 0x100>;
185 reg = <0x10c02b00 0x100>;
196 reg = <0x10c02c00 0x100>;
227 reg = <0x10c03300 0x100>;
344 reg = <0x10c03000 0x100>;
352 reg = <0x10c03100 0x100>;
360 reg = <0x10d00000 0x100>;
[all …]
H A Dsocfpga_agilex.dtsi212 reg = <0xffc03200 0x100>;
232 reg = <0xffc03300 0x100>;
252 reg = <0xffc02800 0x100>;
263 reg = <0xffc02900 0x100>;
274 reg = <0xffc02a00 0x100>;
285 reg = <0xffc02b00 0x100>;
296 reg = <0xffc02c00 0x100>;
380 reg = <0xffd11000 0x100>;
470 reg = <0xffc03000 0x100>;
478 reg = <0xffc03100 0x100>;
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dwm8770.c64 { 27, 0x100 },
353 master = 0x100; in wm8770_set_fmt()
393 snd_soc_component_update_bits(component, WM8770_MSTRCTRL, 0x100, master); in wm8770_set_fmt()
450 if (snd_soc_component_read(component, WM8770_MSTRCTRL) & 0x100) { in wm8770_hw_params()
590 snd_soc_component_update_bits(component, WM8770_MSDIGVOL, 0x100, 0x100); in wm8770_probe()
591 snd_soc_component_update_bits(component, WM8770_MSALGVOL, 0x100, 0x100); in wm8770_probe()
592 snd_soc_component_update_bits(component, WM8770_VOUT1RVOL, 0x100, 0x100); in wm8770_probe()
593 snd_soc_component_update_bits(component, WM8770_VOUT2RVOL, 0x100, 0x100); in wm8770_probe()
594 snd_soc_component_update_bits(component, WM8770_VOUT3RVOL, 0x100, 0x100); in wm8770_probe()
595 snd_soc_component_update_bits(component, WM8770_VOUT4RVOL, 0x100, 0x100); in wm8770_probe()
[all …]
/openbmc/linux/sound/pci/oxygen/
H A Dwm8776.h43 #define WM8776_UPDATE 0x100
47 /*#define WM8776_UPDATE 0x100*/
107 #define WM8776_ADCHPD 0x100
124 #define WM8776_ADCMS 0x100
135 #define WM8776_ZCA 0x100
143 #define WM8776_LCSEL_ALC_LEFT 0x100
149 #define WM8776_LCEN 0x100
167 #define WM8776_LRBOTH 0x100
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi89 reg = <0x00 0x02800000 0x00 0x100>;
99 reg = <0x00 0x02810000 0x00 0x100>;
108 reg = <0x00 0x02820000 0x00 0x100>;
171 reg = <0x0 0x2000000 0x0 0x100>;
183 reg = <0x0 0x2010000 0x0 0x100>;
195 reg = <0x0 0x2020000 0x0 0x100>;
207 reg = <0x0 0x2030000 0x0 0x100>;
778 <0x0 0x31120000 0x0 0x100>,
791 reg = <0x0 0x31150000 0x0 0x100>,
834 reg = <0x0 0x600000 0x0 0x100>;
[all …]
H A Dk3-am64-main.dtsi133 reg = <0x00 0x485c0100 0x00 0x100>,
151 reg = <0x00 0x485c0000 0x00 0x100>,
375 reg = <0x00 0x02800000 0x00 0x100>;
386 reg = <0x00 0x02810000 0x00 0x100>;
397 reg = <0x00 0x02820000 0x00 0x100>;
408 reg = <0x00 0x02830000 0x00 0x100>;
419 reg = <0x00 0x02840000 0x00 0x100>;
430 reg = <0x00 0x02850000 0x00 0x100>;
441 reg = <0x00 0x02860000 0x00 0x100>;
452 reg = <0x00 0x20000000 0x00 0x100>;
[all …]
/openbmc/u-boot/drivers/mtd/
H A Dst_smi.c48 FLASH_ID("st m25p16" , 0xd8, 0x00152020, 0x100, 0x10000, 0x200000),
49 FLASH_ID("st m25p32" , 0xd8, 0x00162020, 0x100, 0x10000, 0x400000),
50 FLASH_ID("st m25p64" , 0xd8, 0x00172020, 0x100, 0x10000, 0x800000),
51 FLASH_ID("st m25p128" , 0xd8, 0x00182020, 0x100, 0x40000, 0x1000000),
54 FLASH_ID("st m25p20" , 0xd8, 0x00122020, 0x100, 0x10000, 0x40000),
55 FLASH_ID("st m25p40" , 0xd8, 0x00132020, 0x100, 0x10000, 0x80000),
56 FLASH_ID("st m25p80" , 0xd8, 0x00142020, 0x100, 0x10000, 0x100000),
57 FLASH_ID("st m45pe10" , 0xd8, 0x00114020, 0x100, 0x10000, 0x20000),
58 FLASH_ID("st m45pe20" , 0xd8, 0x00124020, 0x100, 0x10000, 0x40000),
59 FLASH_ID("st m45pe40" , 0xd8, 0x00134020, 0x100, 0x10000, 0x80000),
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h127 #define DCPG_TEST_DEBUG_INDEX__DCPG_TEST_DEBUG_WRITE_EN_MASK 0x100
165 #define BL1_PWM_GRP2_REG_LOCK__BL1_PWM_GRP2_REG_UPDATE_PENDING_MASK 0x100
239 #define DC_ABM1_ACE_CNTL_MISC__ABM1_ACE_REG_WR_MISSED_FRAME_CLEAR_MASK 0x100
243 #define DC_ABM1_DEBUG_MISC__ABM1_LS_FORCE_INTERRUPT_MASK 0x100
253 #define DC_ABM1_HGLS_REG_READ_PROGRESS__ABM1_HG_REG_READ_MISSED_FRAME_MASK 0x100
267 #define DC_ABM1_HG_MISC_CTRL__ABM1_HG_VMAX_SEL_MASK 0x100
399 #define ABM_TEST_DEBUG_INDEX__ABM_TEST_DEBUG_WRITE_EN_MASK 0x100
405 #define CRTC_DCFE_CLOCK_CONTROL__CRTC_DISPCLK_G_DCP_GATE_DISABLE_MASK 0x100
499 #define CRTC_V_TOTAL_CONTROL__CRTC_FORCE_LOCK_ON_EVENT_MASK 0x100
511 #define CRTC_V_TOTAL_INT_STATUS__CRTC_SET_V_TOTAL_MIN_EVENT_OCCURED_ACK_MASK 0x100
[all …]

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