/openbmc/u-boot/arch/sh/include/asm/ |
H A D | bitops.h | 4 #include <asm-generic/bitops/fls.h> 5 #include <asm-generic/bitops/__fls.h> 6 #include <asm-generic/bitops/fls64.h> 7 #include <asm-generic/bitops/__ffs.h> 16 int mask; in set_bit() local 21 mask = 1 << (nr & 0x1f); in set_bit() 23 *a |= mask; in set_bit() 34 int mask; in clear_bit() local 39 mask = 1 << (nr & 0x1f); in clear_bit() 41 *a &= ~mask; in clear_bit() [all …]
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/openbmc/linux/drivers/video/fbdev/ |
H A D | c2p_core.h | 2 * Fast C2P (Chunky-to-Planar) Conversion 4 * Copyright (C) 2003-2008 Geert Uytterhoeven 7 * - This code was inspired by Scout's C2P tutorial 8 * - It assumes to run on a big endian system 23 unsigned int shift, u32 mask) in _transp() argument 25 u32 t = (d[i1] ^ (d[i2] >> shift)) & mask; in _transp() 57 * Transpose operations on 8 32-bit words 62 u32 mask = get_mask(n); in transp8() local 66 /* First n x 1 block */ in transp8() 67 _transp(d, 0, 1, n, mask); in transp8() [all …]
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/openbmc/linux/include/linux/ |
H A D | pxa2xx_ssp.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * This driver supports the following PXA CPU/SSP ports:- 49 #define SSCR0_DSS GENMASK(3, 0) /* Data Size Select (mask) */ 50 #define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */ argument 51 #define SSCR0_FRF GENMASK(5, 4) /* FRame Format (mask) */ 57 #define SSCR0_SCR(x) ((x) << 8) /* Serial Clock Rate (mask) */ argument 62 #define SSCR0_RIM BIT(22) /* Receive FIFO overrun interrupt mask */ 63 #define SSCR0_TUM BIT(23) /* Transmit FIFO underrun interrupt mask */ 64 #define SSCR0_FRDC GENMASK(26, 24) /* Frame rate divider control (mask) */ 65 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ argument [all …]
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/openbmc/linux/arch/powerpc/platforms/powermac/ |
H A D | pfunc_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only 84 while(bytes--) { 85 printk("%02x ", *((u8 *)blob)); 99 if ((cmd->cmdend - cmd->cmdptr) < 4) { in pmf_next32() 100 cmd->error = 1; in pmf_next32() 103 value = *((u32 *)cmd->cmdptr); in pmf_next32() 104 cmd->cmdptr += 4; in pmf_next32() 111 if ((cmd->cmdend - cmd->cmdptr) < count) { in pmf_next_blob() 112 cmd->error = 1; in pmf_next_blob() 115 value = cmd->cmdptr; in pmf_next_blob() [all …]
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/openbmc/qemu/include/qemu/ |
H A D | bitops.h | 9 * See the COPYING.LIB file in the top-level directory. 16 #include "host-utils.h" 28 (((~0ULL) >> (64 - (length))) << (shift)) 33 * We provide a set of functions which work on arbitrary-length arrays of 37 * - Bits stored in an array of 'unsigned long': set_bit(), clear_bit(), etc 38 * - Bits stored in an array of 'uint32_t': set_bit32(), clear_bit32(), etc 43 * be some guest-visible register view of the bit array. 63 * set_bit - Set a bit in memory 69 unsigned long mask = BIT_MASK(nr); in set_bit() local 72 *p |= mask; in set_bit() [all …]
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/openbmc/u-boot/arch/arm/mach-mvebu/serdes/a38x/ |
H A D | seq_exec.c | 1 // SPDX-License-Identifier: GPL-2.0 18 #define DB(x) x argument 20 #define DB(x) argument 32 u32 unit_base_reg, unit_offset, data, mask, reg_data, reg_addr; in write_op_execute() local 35 data = params->data[data_arr_idx]; in write_op_execute() 36 mask = params->mask; in write_op_execute() 43 CHECK_STATUS(hws_get_ext_base_addr(serdes_num, params->unit_base_reg, in write_op_execute() 44 params->unit_offset, in write_op_execute() 51 printf("Write: 0x%x: 0x%x (mask 0x%x) - ", reg_addr, data, mask); in write_op_execute() 55 reg_data &= (~mask); in write_op_execute() [all …]
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/openbmc/linux/drivers/net/mdio/ |
H A D | mdio-mux-mmioreg.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Simple memory-mapped device MDIO MUX driver 11 #include <linux/mdio-mux.h> 22 unsigned int mask; member 28 * This function is called by the mdio-mux layer when it thinks the mdio bus 32 * s->mask). 37 * The first time this function is called, current_child == -1. 48 void __iomem *p = ioremap(s->phys, s->iosize); in mdio_mux_mmioreg_switch_fn() 50 return -ENOMEM; in mdio_mux_mmioreg_switch_fn() 52 switch (s->iosize) { in mdio_mux_mmioreg_switch_fn() [all …]
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/openbmc/qemu/hw/net/rocker/ |
H A D | rocker-hmp-cmds.c | 10 * the COPYING file in the top-level directory. 12 * Contributions after 2012-01-13 are licensed under the terms of the 20 #include "qapi/qapi-commands-rocker.h" 34 monitor_printf(mon, "name: %s\n", rocker->name); in hmp_rocker() 35 monitor_printf(mon, "id: 0x%" PRIx64 "\n", rocker->id); in hmp_rocker() 36 monitor_printf(mon, "ports: %d\n", rocker->ports); in hmp_rocker() 55 for (port = list; port; port = port->next) { in hmp_rocker_ports() 56 monitor_printf(mon, "%10s %-4s %-3s %2s %s\n", in hmp_rocker_ports() 57 port->value->name, in hmp_rocker_ports() 58 port->value->enabled ? port->value->link_up ? in hmp_rocker_ports() [all …]
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/openbmc/qemu/hw/i386/ |
H A D | trace-events | 3 # x86-iommu.c 4 …otify(bool global, uint32_t index, uint32_t mask) "Notify IEC invalidation: global=%d index=%" PRI… 7 …onst char *type, uint64_t hi, uint64_t lo) "invalidate desc type %s high 0x%"PRIx64" low 0x%"PRIx64 8 vtd_inv_desc_cc_domain(uint16_t domain) "context invalidate domain 0x%"PRIx16 11 …_devices(uint16_t sid, uint16_t fmask) "context invalidate devices sid 0x%"PRIx16" fmask 0x%"PRIx16 13 vtd_inv_desc_iotlb_domain(uint16_t domain) "iotlb invalidate whole domain 0x%"PRIx16 14 …es(uint16_t domain, uint64_t addr, uint8_t mask) "iotlb invalidate domain 0x%"PRIx16" addr 0x%"PRI… 15 …n, uint64_t addr, uint8_t mask, uint32_t pasid) "iotlb invalidate domain 0x%"PRIx16" addr 0x%"PRIx… 16 …_iotlb_pasid(uint16_t domain, uint32_t pasid) "iotlb invalidate domain 0x%"PRIx16" pasid 0x%"PRIx32 17 …ait_sw(uint64_t addr, uint32_t data) "wait invalidate status write addr 0x%"PRIx64" data 0x%"PRIx32 [all …]
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/openbmc/u-boot/arch/microblaze/cpu/ |
H A D | interrupts.c | 1 // SPDX-License-Identifier: GPL-2.0+ 7 * Yasushi SHOJI <yashi@atmark-techno.com> 48 int mask; in enable_one_interrupt() local 52 mask = intc->ier; in enable_one_interrupt() 53 intc->ier = (mask | offset); in enable_one_interrupt() 55 debug("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask, in enable_one_interrupt() 56 intc->ier); in enable_one_interrupt() 57 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, in enable_one_interrupt() 58 intc->iar, intc->mer); in enable_one_interrupt() 63 int mask; in disable_one_interrupt() local [all …]
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/openbmc/u-boot/arch/microblaze/include/asm/ |
H A D | bitops.h | 10 #include <asm-generic/bitops/fls.h> 11 #include <asm-generic/bitops/__fls.h> 12 #include <asm-generic/bitops/fls64.h> 13 #include <asm-generic/bitops/__ffs.h> 39 int mask; in set_bit() local 43 mask = 1 << (nr & 0x1f); in set_bit() 45 *a |= mask; in set_bit() 52 int mask; in __set_bit() local 55 mask = 1 << (nr & 0x1f); in __set_bit() 56 *a |= mask; in __set_bit() [all …]
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/openbmc/linux/drivers/video/fbdev/core/ |
H A D | fb_draw.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 11 * This is equivalent to (a & mask) | (b & ~mask) 15 comp(unsigned long a, unsigned long b, unsigned long mask) in comp() argument 17 return ((a ^ b) & mask) ^ b; in comp() 104 u32 mask; in fb_shifted_pixels_mask_u32() local 107 mask = FB_SHIFT_HIGH(p, ~(u32)0, index); in fb_shifted_pixels_mask_u32() 109 mask = 0xff << FB_LEFT_POS(p, 8); in fb_shifted_pixels_mask_u32() 110 mask = FB_SHIFT_LOW(p, mask, index & (bswapmask)) & mask; in fb_shifted_pixels_mask_u32() 111 mask = FB_SHIFT_HIGH(p, mask, index & ~(bswapmask)); in fb_shifted_pixels_mask_u32() 113 /* Shift argument is limited to 0 - 31 on x86 based CPU's */ in fb_shifted_pixels_mask_u32() [all …]
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/openbmc/u-boot/arch/powerpc/include/asm/ |
H A D | bitops.h | 9 #include <asm-generic/bitops/__ffs.h> 29 * resulted in errors from egcs. Things may be OK with gcc-2.95. 34 unsigned long mask = 1 << (nr & 0x1f); in set_bit() local 44 : "r" (mask), "r" (p), "m" (*p) in set_bit() 51 unsigned long mask = 1 << (nr & 0x1f); in clear_bit() local 61 : "r" (mask), "r" (p), "m" (*p) in clear_bit() 68 unsigned long mask = 1 << (nr & 0x1f); in change_bit() local 78 : "r" (mask), "r" (p), "m" (*p) in change_bit() 85 unsigned int mask = 1 << (nr & 0x1f); in test_and_set_bit() local 95 : "r" (mask), "r" (p), "m" (*p) in test_and_set_bit() [all …]
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/openbmc/qemu/ui/ |
H A D | cursor.c | 7 /* for creating built-in cursors */ 13 unsigned int line = 0, i, r, g, b, x, y, pixel; in cursor_parse_xpm() local 33 if (sscanf(name, "#%02x%02x%02x", &r, &g, &b) == 3) { in cursor_parse_xpm() 52 for (x = 0; x < height; x++, pixel++) { in cursor_parse_xpm() 53 idx = xpm[line][x]; in cursor_parse_xpm() 54 c->data[pixel] = ctab[idx]; in cursor_parse_xpm() 63 uint32_t *data = c->data; in cursor_print_ascii_art() 64 int x,y; in cursor_print_ascii_art() local 66 for (y = 0; y < c->height; y++) { in cursor_print_ascii_art() 68 for (x = 0; x < c->width; x++, data++) { in cursor_print_ascii_art() [all …]
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/openbmc/linux/drivers/gpu/drm/tegra/ |
H A D | firewall.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (c) 2010-2020 NVIDIA Corporation */ 19 if (fw->pos == fw->end) in fw_next() 20 return -EINVAL; in fw_next() 22 *word = fw->data[fw->pos++]; in fw_next() 31 for (i = 0; i < fw->submit->num_used_mappings; i++) { in fw_check_addr_valid() 32 struct tegra_drm_mapping *m = fw->submit->used_mappings[i].mapping; in fw_check_addr_valid() 34 if (offset >= m->iova && offset <= m->iova_end) in fw_check_addr_valid() 51 if (!fw->client->ops->is_addr_reg) in fw_check_reg() 54 is_addr = fw->client->ops->is_addr_reg(fw->client->base.dev, fw->class, in fw_check_reg() [all …]
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/openbmc/linux/drivers/net/ethernet/intel/igc/ |
H A D | igc_diag.c | 1 // SPDX-License-Identifier: GPL-2.0 36 u32 mask, u32 write) in reg_pattern_test() argument 38 struct igc_hw *hw = &adapter->hw; in reg_pattern_test() 48 if (val != (test_pattern[pat] & write & mask)) { in reg_pattern_test() 49 netdev_err(adapter->netdev, in reg_pattern_test() 50 "pattern test reg %04X failed: got 0x%08X expected 0x%08X", in reg_pattern_test() 51 reg, val, test_pattern[pat] & write & mask); in reg_pattern_test() 62 u32 mask, u32 write) in reg_set_and_check() argument 64 struct igc_hw *hw = &adapter->hw; in reg_set_and_check() 68 wr32(reg, write & mask); in reg_set_and_check() [all …]
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/openbmc/linux/drivers/gpu/drm/exynos/ |
H A D | regs-rotator.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* drivers/gpu/drm/exynos/regs-rotator.h 34 #define ROT_STATUS_IRQ_PENDING(x) (1 << (x)) argument 35 #define ROT_STATUS_IRQ(x) (((x) >> 8) & 0x3) argument 46 #define ROT_SET_BUF_SIZE_H(x) ((x) << 16) argument 47 #define ROT_SET_BUF_SIZE_W(x) ((x) << 0) argument 48 #define ROT_GET_BUF_SIZE_H(x) ((x) >> 16) argument 49 #define ROT_GET_BUF_SIZE_W(x) ((x) & 0xffff) argument 54 #define ROT_CROP_POS_Y(x) ((x) << 16) argument 55 #define ROT_CROP_POS_X(x) ((x) << 0) argument [all …]
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/openbmc/linux/arch/xtensa/include/asm/ |
H A D | bitops.h | 2 * include/asm-xtensa/bitops.h 10 * Copyright (C) 2001 - 2007 Tensilica Inc. 24 #include <asm-generic/bitops/non-atomic.h> 28 static inline unsigned long __cntlz (unsigned long x) in __cntlz() argument 31 asm ("nsau %0, %1" : "=r" (lz) : "r" (x)); in __cntlz() 40 static inline int ffz(unsigned long x) in ffz() argument 42 return 31 - __cntlz(~x & -~x); in ffz() 49 static inline unsigned long __ffs(unsigned long x) in __ffs() argument 51 return 31 - __cntlz(x & -x); in __ffs() 60 static inline int ffs(unsigned long x) in ffs() argument [all …]
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/openbmc/linux/arch/alpha/lib/ |
H A D | divide.S | 1 /* SPDX-License-Identifier: GPL-2.0 */ 14 * __divqu: 64-bit unsigned long divide 15 * __remqu: 64-bit unsigned long remainder 16 * __divqs/__remqs: signed 64-bit 17 * __divlu/__remlu: unsigned 32-bit 18 * __divls/__remls: signed 32-bit 27 * This is a rather simple bit-at-a-time algorithm: it's very good 28 * at dividing random 64-bit numbers, but the more usual case where 37 * $0 - current bit 38 * $1 - shifted divisor [all …]
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/openbmc/linux/drivers/rtc/ |
H A D | rtc-sunxi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 47 #define SUNXI_GET(x, mask, shift) (((x) & ((mask) << (shift))) \ argument 50 #define SUNXI_SET(x, mask, shift) (((x) & (mask)) << (shift)) argument 55 #define SUNXI_DATE_GET_DAY_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 0) argument 56 #define SUNXI_DATE_GET_MON_VALUE(x) SUNXI_GET(x, SUNXI_MASK_M, 8) argument 57 #define SUNXI_DATE_GET_YEAR_VALUE(x, mask) SUNXI_GET(x, mask, 16) argument 62 #define SUNXI_TIME_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0) argument 63 #define SUNXI_TIME_GET_MIN_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 8) argument 64 #define SUNXI_TIME_GET_HOUR_VALUE(x) SUNXI_GET(x, SUNXI_MASK_DH, 16) argument 69 #define SUNXI_ALRM_GET_SEC_VALUE(x) SUNXI_GET(x, SUNXI_MASK_SM, 0) argument [all …]
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/openbmc/linux/drivers/iommu/ |
H A D | omap-iopgtable.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2008-2010 Nokia Corporation 16 * "L2 table" address mask and size definitions. 20 #define IOPGD_MASK (~(IOPGD_SIZE - 1)) 23 * "section" address mask and size definitions. 27 #define IOSECTION_MASK (~(IOSECTION_SIZE - 1)) 30 * "supersection" address mask and size definitions. 34 #define IOSUPER_MASK (~(IOSUPER_SIZE - 1)) 36 #define PTRS_PER_IOPGD (1UL << (32 - IOPGD_SHIFT)) 40 * "small page" address mask and size definitions. [all …]
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/openbmc/linux/drivers/gpu/host1x/hw/ |
H A D | debug_hw.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (C) 2011-2013 NVIDIA Corporation 44 unsigned int mask, subop, num, opcode; in show_channel_command() local 50 mask = val & 0x3f; in show_channel_command() 51 if (mask) { in show_channel_command() 52 host1x_debug_cont(o, "SETCL(class=%03x, offset=%03x, mask=%02x, [", in show_channel_command() 54 val >> 16 & 0xfff, mask); in show_channel_command() 55 return hweight8(mask); in show_channel_command() 58 host1x_debug_cont(o, "SETCL(class=%03x)\n", val >> 6 & 0x3ff); in show_channel_command() 63 host1x_debug_cont(o, "INCR(offset=%03x, [", in show_channel_command() [all …]
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/openbmc/u-boot/arch/riscv/include/asm/ |
H A D | bitops.h | 24 #include <asm-generic/bitops/fls.h> 25 #include <asm-generic/bitops/__fls.h> 26 #include <asm-generic/bitops/fls64.h> 27 #include <asm-generic/bitops/__ffs.h> 33 * Function prototypes to keep gcc -Wall happy. 38 int mask; in __set_bit() local 41 mask = 1 << (nr & 0x1f); in __set_bit() 42 *a |= mask; in __set_bit() 50 int mask; in __clear_bit() local 53 mask = 1 << (nr & 0x1f); in __clear_bit() [all …]
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/openbmc/linux/arch/powerpc/include/asm/ |
H A D | bitops.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 13 * big-endian system because, unlike little endian, the number of each 22 * There are a few little-endian macros used mostly for filesystem 24 * byte-oriented: 27 * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit 28 * number field needs to be reversed compared to the big-endian bit 42 #include <asm/asm-compat.h> 46 #define PPC_BITLSHIFT(be) (BITS_PER_LONG - 1 - (be)) 48 #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs)) 54 #define PPC_BITLSHIFT32(be) (32 - 1 - (be)) [all …]
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_hw_sequencer_debug.c | 65 chars_printed = bufsize - 1; in snprintf_count() 74 struct dc_context *dc_ctx = dc->ctx; in dcn10_get_hubbub_state() 81 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clocks.dchub_ref_clock_inKhz / 1000; in dcn10_get_hubbub_state() 85 dc->res_pool->hubbub->funcs->wm_read_state(dc->res_pool->hubbub, &wm); in dcn10_get_hubbub_state() 88 remaining_buffer -= chars_printed; in dcn10_get_hubbub_state() 96 …chars_printed = snprintf_count(pBuf, remaining_buffer, "%x,%d.%03d,%d.%03d,%d.%03d,%d.%03d,%d.%03d… in dcn10_get_hubbub_state() 97 s->wm_set, in dcn10_get_hubbub_state() 98 (s->data_urgent * frac) / ref_clk_mhz / frac, (s->data_urgent * frac) / ref_clk_mhz % frac, in dcn10_get_hubbub_state() 99 …(s->pte_meta_urgent * frac) / ref_clk_mhz / frac, (s->pte_meta_urgent * frac) / ref_clk_mhz % frac, in dcn10_get_hubbub_state() 100 (s->sr_enter * frac) / ref_clk_mhz / frac, (s->sr_enter * frac) / ref_clk_mhz % frac, in dcn10_get_hubbub_state() [all …]
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