| /openbmc/linux/Documentation/devicetree/bindings/power/reset/ |
| H A D | atmel,at91sam9260-shdwc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/atmel,at91sam9260-shdwc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
14 and VDDCORE and the wake-up detection on debounced input lines.
19 - atmel,at91sam9260-shdwc
20 - atmel,at91sam9rl-shdwc
21 - atmel,at91sam9x5-shdwc
29 atmel,wakeup-mode:
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| H A D | atmel,sama5d2-shdwc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/atmel,sama5d2-shdwc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
14 and VDDCORE and the wake-up detection on debounced input lines.
19 - items:
20 - const: microchip,sama7g5-shdwc
21 - const: syscon
22 - enum:
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| /openbmc/linux/drivers/rtc/ |
| H A D | rtc-brcmstb-waketimer.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2014-2023 Broadcom
22 #include <linux/rtc.h>
27 struct rtc_device *rtc; member
49 static inline bool brcmstb_waketmr_is_pending(struct brcmstb_waketmr *timer) in brcmstb_waketmr_is_pending() argument
53 reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_is_pending()
57 static inline void brcmstb_waketmr_clear_alarm(struct brcmstb_waketmr *timer) in brcmstb_waketmr_clear_alarm() argument
61 if (timer->alarm_en && timer->alarm_irq) in brcmstb_waketmr_clear_alarm()
62 disable_irq(timer->alarm_irq); in brcmstb_waketmr_clear_alarm()
63 timer->alarm_en = false; in brcmstb_waketmr_clear_alarm()
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| H A D | rtc-meson-vrtc.c | 1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/rtc.h>
16 struct rtc_device *rtc; member
35 writel_relaxed(time, vrtc->io_alarm); in meson_vrtc_set_wakeup_time()
42 dev_dbg(dev, "%s: alarm->enabled=%d\n", __func__, alarm->enabled); in meson_vrtc_set_alarm()
43 if (alarm->enabled) in meson_vrtc_set_alarm()
44 vrtc->alarm_time = rtc_tm_to_time64(&alarm->time); in meson_vrtc_set_alarm()
46 vrtc->alarm_time = 0; in meson_vrtc_set_alarm()
55 vrtc->enabled = enabled; in meson_vrtc_alarm_irq_enable()
69 vrtc = devm_kzalloc(&pdev->dev, sizeof(*vrtc), GFP_KERNEL); in meson_vrtc_probe()
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| H A D | rtc-at91sam9.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * Based on rtc-at91rm9200.c by Rick Bronson
20 #include <linux/rtc.h>
30 * - A "Real-time Timer" (RTT) counts up in seconds from a base time.
33 * - One of the "General Purpose Backup Registers" (GPBRs) holds the
35 * epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the
38 * The RTC's value is the RTT counter plus that offset. The RTC's alarm
42 * choose from, or a "real" RTC module. All systems have multiple GPBR
43 * registers available, likewise usable for more than "RTC" support.
46 #define AT91_RTT_MR 0x00 /* Real-time Mode Register */
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| /openbmc/linux/arch/arm/boot/dts/microchip/ |
| H A D | at91sam9260ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
17 stdout-path = &dbgu;
26 clock-frequency = <32768>;
30 clock-frequency = <18432000>;
36 tcb0: timer@fffa0000 {
37 timer@0 {
38 compatible = "atmel,tcb-timer";
42 timer@2 {
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| H A D | at91sam9261ek.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 /dts-v1/;
16 stdout-path = "serial0:115200n8";
25 clock-frequency = <32768>;
29 clock-frequency = <18432000>;
40 atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
44 bits-per-pixel = <16>;
45 atmel,lcdcon-backlight;
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| H A D | at91sam9g20ek_common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9g20ek_common.dtsi - Device Tree file for Atmel at91sam9g20ek board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 #include <dt-bindings/input/input.h>
14 stdout-path = "serial0:115200n8";
23 clock-frequency = <32768>;
27 clock-frequency = <18432000>;
50 pinctrl_board_mmc0_slot1: mmc0_slot1-board {
61 tcb0: timer@fffa0000 {
62 timer@0 {
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| H A D | at91sam9rlek.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9rlek.dts - Device Tree file for Atmel at91sam9rl reference board
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 /dts-v1/;
17 stdout-path = "serial0:115200n8";
26 clock-frequency = <32768>;
30 clock-frequency = <12000000>;
40 bits-per-pixel = <16>;
41 atmel,lcdcon-backlight;
44 atmel,guard-time = <1>;
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| H A D | at91sam9263ek.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9263ek.dts - Device Tree file for Atmel at91sam9263 reference board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
16 stdout-path = "serial0:115200n8";
25 clock-frequency = <32768>;
29 clock-frequency = <16367660>;
39 tcb0: timer@fff7c000 {
40 timer@0 {
41 compatible = "atmel,tcb-timer";
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| H A D | at91sam9m10g45ek.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
8 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
13 model = "Atmel AT91SAM9M10G45-EK";
18 stdout-path = "serial0:115200n8";
27 clock-frequency = <32768>;
31 clock-frequency = <12000000>;
41 tcb0: timer@fff7c000 {
42 timer@0 {
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| H A D | at91-kizbox.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-kizbox.dts - Device Tree file for Overkiz Kizbox board
5 * Copyright (C) 2012-2014 Boris BREZILLON <b.brezillon@overkiz.com>
6 * 2014-2015 Gaël PORTAY <g.portay@overkiz.com>
8 /dts-v1/;
10 #include <dt-bindings/pwm/pwm.h>
18 stdout-path = &dbgu;
27 clock-frequency = <18432000>;
31 gpio-keys {
32 compatible = "gpio-keys";
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| H A D | at91-sama5d27_wlsom1_ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK
9 /dts-v1/;
10 #include "at91-sama5d27_wlsom1.dtsi"
11 #include <dt-bindings/input/input.h>
15 …compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel…
26 stdout-path = "serial0:115200n8";
29 gpio-keys {
30 compatible = "gpio-keys";
32 pinctrl-names = "default";
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| /openbmc/linux/Documentation/devicetree/bindings/rtc/ |
| H A D | rtc-omap.txt | 4 - compatible:
5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family.
6 - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family.
7 This RTC IP has special WAKE-EN Register to enable
8 Wakeup generation for event Alarm. It can also be
11 - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family.
12 - reg: Address range of rtc register set
13 - interrupts: rtc timer, alarm interrupts in order
16 - system-power-controller: whether the rtc is controlling the system power
18 - clocks: Any internal or external clocks feeding in to rtc
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| H A D | qcom-pm8xxx-rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/qcom-pm8xxx-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PM8xxx PMIC RTC device
10 - Satya Priya <quic_c_skakit@quicinc.com>
15 - enum:
16 - qcom,pm8058-rtc
17 - qcom,pm8921-rtc
18 - qcom,pm8941-rtc
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| /openbmc/linux/drivers/power/reset/ |
| H A D | at91-poweroff.c | 5 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
28 #define AT91_SHDW_WKMODE0 GENMASK(2, 0) /* Wake-up 0 Mode Selection */
32 #define AT91_SHDW_RTTWKEN BIT(16) /* Real Time Timer Wake-up Enable */
33 #define AT91_SHDW_RTCWKEN BIT(17) /* Real Time Clock Wake-up Enable */
36 #define AT91_SHDW_WAKEUP0 BIT(0) /* Wake-up 0 Status */
37 #define AT91_SHDW_RTTWK BIT(16) /* Real-time Timer Wake-up */
38 #define AT91_SHDW_RTCWK BIT(17) /* Real-time Clock Wake-up [SAM9RL] */
65 /* Simple power-on, just bail out */ in at91_wakeup_status()
72 reason = "RTC"; in at91_wakeup_status()
76 dev_info(&pdev->dev, "Wake-Up source: %s\n", reason); in at91_wakeup_status()
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| /openbmc/linux/Documentation/power/ |
| H A D | charger-manager.rst | 7 Charger Manager provides in-kernel battery charger management that
8 requires temperature monitoring during suspend-to-RAM state
12 Charger Manager is a platform_driver with power-supply-class entries.
13 An instance of Charger Manager (a platform-device created with Charger-Manager)
26 own power-supply-class and each power-supply-class can provide
28 aggregates charger-related information from multiple sources and
29 shows combined information as a single power-supply-class.
31 * Support for in suspend-to-RAM polling (with suspend_again callback)
32 While the battery is being charged and the system is in suspend-to-RAM,
50 * Support for premature full-battery event handling
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| /openbmc/linux/Documentation/arch/ia64/ |
| H A D | efirtc.rst | 13 the IA-64 platform.
31 Because we wanted to minimize the impact on existing user-level apps using
33 used today with the legacy RTC driver (driver/char/rtc.c). However, because
39 the reference date is different. Year is the using the full 4-digit format.
48 ioctl()s. The other is read-only via the /proc filesystem.
52 To allow for a uniform interface between the legacy RTC and EFI time service,
53 we have created the include/linux/rtc.h header file to contain only the
54 "public" API of the two drivers. The specifics of the legacy RTC are still
62 Two ioctl()s, compatible with the legacy RTC calls:
66 ioctl(d, RTC_RD_TIME, &rtc);
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | at91sam9g20ek_common.dtsi | 2 * at91sam9g20ek_common.dtsi - Device Tree file for Atmel at91sam9g20ek board
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
12 u-boot,dm-pre-reloc;
13 stdout-path = &dbgu;
22 clock-frequency = <32768>;
26 clock-frequency = <18432000>;
42 pinctrl_board_mmc0_slot1: mmc0_slot1-board {
50 u-boot,dm-pre-reloc;
55 pinctrl-0 =
70 phy-mode = "rmii";
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| H A D | at91sam9260ek.dts | 7 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
53 u-boot,dm-pre-reloc;
54 stdout-path = &dbgu;
63 clock-frequency = <32768>;
67 clock-frequency = <18432000>;
74 atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
79 pinctrl-0 = <
87 bus-width = <4>;
88 cd-gpios = <&pioC 9 GPIO_ACTIVE_HIGH>;
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| H A D | at91sam9g45-gurnard.dts | 2 * at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board
4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 /dts-v1/;
17 stdout-path = "serial0:115200n8";
26 clock-frequency = <32768>;
30 clock-frequency = <18432000>;
35 u-boot,dm-pre-reloc;
38 u-boot,dm-pre-reloc;
40 display-timings {
42 clock-frequency = <4166666>;
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| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8dxl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx8-clock.h>
7 #include <dt-bindings/firmware/imx/rsrc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/pads-imx8dxl.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
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| /openbmc/linux/kernel/power/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
9 suspend-to-RAM state (e.g. the ACPI S3 state).
30 user-space before invoking suspend. There's a run-time switch
32 This setting changes the default for the run-tim switch. Say Y
60 for suspend states like suspend-to-RAM (STR) often don't work very
72 <file:Documentation/power/swsusp-and-swap-files.rst>).
100 The default resume partition is the partition that the suspend-
101 to-disk implementation will look for a suspended disk image.
135 non-zero numbered CPU, it may define ARCH_SUSPEND_NONZERO_CPU. This
143 state automatically whenever there are no active wakeup sources.
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| /openbmc/linux/arch/powerpc/platforms/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
37 bool "ePAPR para-virtualization support"
39 Enables ePAPR para-virtualization support for guests.
48 a hypervisor. This option is not user-selectable but should
65 bool "Device-tree based CPU feature discovery & setup"
94 bool "MPIC Global Timer"
97 The MPIC global timer is a hardware timer inside the
99 specified interval times out, the hardware timer generates
105 tristate "Freescale MPIC global timer wakeup driver"
109 timer.
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| /openbmc/linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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