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/openbmc/linux/arch/sh/drivers/pci/
H A Dpcie-sh7786.h44 #define BITS_BADOPC (5) /* 5 BADOPC 0 R/W */
46 #define BITS_BADDEST (4) /*4 BADDEST 0 R/W */
48 #define BITS_UNSOLRESP (3) /* 3 UNSOLRESP 0 R/W */
56 #define SH4A_PCIEENBLR (0x000008) /* R/W - 0x0000 0001 32 */
59 #define SH4A_PCIEECR (0x00000C) /* R/W - 0x0000 0000 32 */
60 #define BITS_ENBL (0) /* 0 ENBL 0 R/W */
64 #define SH4A_PCIEPAR (0x000010) /* R/W - 0x0000 0000 32 */
77 #define SH4A_PCIEPCTLR (0x000018) /* R/W - 0x0000 0000 32 */
86 #define SH4A_PCIEPDR (0x000020) /* R/W - 0x0000 0000 32 */
91 #define SH4A_PCIEMSGALR (0x000030) /* R/W - 0x0000 0000 32 */
[all …]
/openbmc/qemu/tests/tcg/hexagon/
H A Dhvx_histogram_row.S105 v0.w = vdmpy(v0.h, r10.h):sat
108 v1.w = vdmpy(v1.h, r10.h):sat
111 v2.w = vdmpy(v2.h, r10.h):sat
114 v3.w = vdmpy(v3.h, r10.h):sat
117 v4.w = vdmpy(v4.h, r10.h):sat
120 v5.w = vdmpy(v5.h, r10.h):sat
123 v6.w = vdmpy(v6.h, r10.h):sat
126 v7.w = vdmpy(v7.h, r10.h):sat
129 v8.w = vdmpy(v8.h, r10.h):sat
132 v9.w = vdmpy(v9.h, r10.h):sat
[all …]
/openbmc/linux/drivers/input/joystick/
H A Dwalkera0701.c62 static inline void walkera0701_parse_frame(struct walkera_dev *w) in walkera0701_parse_frame() argument
70 crc1 += w->buf[i] & 7; in walkera0701_parse_frame()
71 crc2 += (w->buf[i] & 8) >> 3; in walkera0701_parse_frame()
73 if ((w->buf[10] & 7) != (crc1 & 7)) in walkera0701_parse_frame()
75 if (((w->buf[10] & 8) >> 3) != (((crc1 >> 3) + crc2) & 1)) in walkera0701_parse_frame()
78 crc1 += w->buf[i] & 7; in walkera0701_parse_frame()
79 crc2 += (w->buf[i] & 8) >> 3; in walkera0701_parse_frame()
81 if ((w->buf[23] & 7) != (crc1 & 7)) in walkera0701_parse_frame()
83 if (((w->buf[23] & 8) >> 3) != (((crc1 >> 3) + crc2) & 1)) in walkera0701_parse_frame()
85 val1 = ((w->buf[0] & 7) * 256 + w->buf[1] * 16 + w->buf[2]) >> 2; in walkera0701_parse_frame()
[all …]
/openbmc/linux/tools/include/asm-generic/bitops/
H A Dconst_hweight.h8 #define __const_hweight8(w) \ argument
10 ((!!((w) & (1ULL << 0))) + \
11 (!!((w) & (1ULL << 1))) + \
12 (!!((w) & (1ULL << 2))) + \
13 (!!((w) & (1ULL << 3))) + \
14 (!!((w) & (1ULL << 4))) + \
15 (!!((w) & (1ULL << 5))) + \
16 (!!((w) & (1ULL << 6))) + \
17 (!!((w) & (1ULL << 7)))))
19 #define __const_hweight16(w) (__const_hweight8(w) + __const_hweight8((w) >> 8 )) argument
[all …]
/openbmc/linux/include/asm-generic/bitops/
H A Dconst_hweight.h8 #define __const_hweight8(w) \ argument
10 ((!!((w) & (1ULL << 0))) + \
11 (!!((w) & (1ULL << 1))) + \
12 (!!((w) & (1ULL << 2))) + \
13 (!!((w) & (1ULL << 3))) + \
14 (!!((w) & (1ULL << 4))) + \
15 (!!((w) & (1ULL << 5))) + \
16 (!!((w) & (1ULL << 6))) + \
17 (!!((w) & (1ULL << 7)))))
19 #define __const_hweight16(w) (__const_hweight8(w) + __const_hweight8((w) >> 8 )) argument
[all …]
/openbmc/qemu/pc-bios/
HDopenbios-ppc ... w < 0 w $ t o \ v H o w t w h \ w P o D h R ! ...
/openbmc/qemu/include/hw/i2c/
H A Dpmbus_device.h16 PMBUS_PAGE = 0x00, /* R/W byte */
17 PMBUS_OPERATION = 0x01, /* R/W byte */
18 PMBUS_ON_OFF_CONFIG = 0x02, /* R/W byte */
20 PMBUS_PHASE = 0x04, /* R/W byte */
23 PMBUS_WRITE_PROTECT = 0x10, /* R/W byte */
35 PMBUS_VOUT_MODE = 0x20, /* R/W byte */
36 PMBUS_VOUT_COMMAND = 0x21, /* R/W word */
37 PMBUS_VOUT_TRIM = 0x22, /* R/W word */
38 PMBUS_VOUT_CAL_OFFSET = 0x23, /* R/W word */
39 PMBUS_VOUT_MAX = 0x24, /* R/W word */
[all …]
/openbmc/linux/include/linux/
H A Dww_mutex.h88 * ww_mutex_init - initialize the w/w mutex
90 * @ww_class: the w/w class the mutex should belong to
92 * Initialize the w/w mutex to unlocked state and associate it with the given
93 * class. Static define macro for w/w mutex is not provided and this function
94 * is the only way to properly initialize the w/w mutex.
109 * ww_acquire_init - initialize a w/w acquire context
110 * @ctx: w/w acquire context to initialize
111 * @ww_class: w/w class of the context
113 * Initializes an context to acquire multiple mutexes of the given w/w class.
115 * Context-based w/w mutex acquiring can be done in any order whatsoever within
[all …]
/openbmc/linux/net/ipv4/
H A Dtcp_westwood.c63 struct westwood *w = inet_csk_ca(sk); in tcp_westwood_init() local
65 w->bk = 0; in tcp_westwood_init()
66 w->bw_ns_est = 0; in tcp_westwood_init()
67 w->bw_est = 0; in tcp_westwood_init()
68 w->accounted = 0; in tcp_westwood_init()
69 w->cumul_ack = 0; in tcp_westwood_init()
70 w->reset_rtt_min = 1; in tcp_westwood_init()
71 w->rtt_min = w->rtt = TCP_WESTWOOD_INIT_RTT; in tcp_westwood_init()
72 w->rtt_win_sx = tcp_jiffies32; in tcp_westwood_init()
73 w->snd_una = tcp_sk(sk)->snd_una; in tcp_westwood_init()
[all …]
/openbmc/u-boot/drivers/net/
H A Dsmc911x.h104 #define INT_CFG_INT_DEAS 0xFF000000 /* R/W */
108 #define INT_CFG_IRQ_EN 0x00000100 /* R/W */
109 /* R/W Not Affected by SW Reset */
111 /* R/W Not Affected by SW Reset */
144 #define INT_EN_SW_INT_EN 0x80000000 /* R/W */
145 #define INT_EN_TXSTOP_INT_EN 0x02000000 /* R/W */
146 #define INT_EN_RXSTOP_INT_EN 0x01000000 /* R/W */
147 #define INT_EN_RXDFH_INT_EN 0x00800000 /* R/W */
148 /*#define INT_EN_RXDF_INT_EN 0x00400000*/ /* R/W */
149 #define INT_EN_TIOC_INT_EN 0x00200000 /* R/W */
[all …]
/openbmc/u-boot/drivers/usb/musb/
H A Dmusb_debug.h27 static inline void musb_print_csr0(u16 w) in musb_print_csr0() argument
29 serial_printf("\tcsr0 0x%4.4x\n", w); in musb_print_csr0()
30 MUSB_FLAGS_PRINT(w, CSR0, FLUSHFIFO); in musb_print_csr0()
31 MUSB_FLAGS_PRINT(w, CSR0_P, SVDSETUPEND); in musb_print_csr0()
32 MUSB_FLAGS_PRINT(w, CSR0_P, SVDRXPKTRDY); in musb_print_csr0()
33 MUSB_FLAGS_PRINT(w, CSR0_P, SENDSTALL); in musb_print_csr0()
34 MUSB_FLAGS_PRINT(w, CSR0_P, SETUPEND); in musb_print_csr0()
35 MUSB_FLAGS_PRINT(w, CSR0_P, DATAEND); in musb_print_csr0()
36 MUSB_FLAGS_PRINT(w, CSR0_P, SENTSTALL); in musb_print_csr0()
37 MUSB_FLAGS_PRINT(w, CSR0, TXPKTRDY); in musb_print_csr0()
[all …]
/openbmc/linux/tools/lib/
H A Dhweight.c12 unsigned int __sw_hweight32(unsigned int w) in __sw_hweight32() argument
15 w -= (w >> 1) & 0x55555555; in __sw_hweight32()
16 w = (w & 0x33333333) + ((w >> 2) & 0x33333333); in __sw_hweight32()
17 w = (w + (w >> 4)) & 0x0f0f0f0f; in __sw_hweight32()
18 return (w * 0x01010101) >> 24; in __sw_hweight32()
20 unsigned int res = w - ((w >> 1) & 0x55555555); in __sw_hweight32()
28 unsigned int __sw_hweight16(unsigned int w) in __sw_hweight16() argument
30 unsigned int res = w - ((w >> 1) & 0x5555); in __sw_hweight16()
36 unsigned int __sw_hweight8(unsigned int w) in __sw_hweight8() argument
38 unsigned int res = w - ((w >> 1) & 0x55); in __sw_hweight8()
[all …]
/openbmc/linux/lib/
H A Dhweight.c13 unsigned int __sw_hweight32(unsigned int w) in __sw_hweight32() argument
16 w -= (w >> 1) & 0x55555555; in __sw_hweight32()
17 w = (w & 0x33333333) + ((w >> 2) & 0x33333333); in __sw_hweight32()
18 w = (w + (w >> 4)) & 0x0f0f0f0f; in __sw_hweight32()
19 return (w * 0x01010101) >> 24; in __sw_hweight32()
21 unsigned int res = w - ((w >> 1) & 0x55555555); in __sw_hweight32()
30 unsigned int __sw_hweight16(unsigned int w) in __sw_hweight16() argument
32 unsigned int res = w - ((w >> 1) & 0x5555); in __sw_hweight16()
39 unsigned int __sw_hweight8(unsigned int w) in __sw_hweight8() argument
41 unsigned int res = w - ((w >> 1) & 0x55); in __sw_hweight8()
[all …]
/openbmc/linux/arch/m68k/ifpsp060/src/
H A Ditest.S173 mov.w &0x0004,ICCR(%a6)
174 mov.w &0x0000,%cc
179 mov.w %cc,SCCR(%a6)
197 mov.w &0x0004,ICCR(%a6)
198 mov.w &0x0000,%cc
203 mov.w %cc,SCCR(%a6)
220 mov.w &0x0000,ICCR(%a6)
221 mov.w &0x0000,%cc
226 mov.w %cc,SCCR(%a6)
243 mov.w &0x0000,ICCR(%a6)
[all …]
/openbmc/linux/arch/loongarch/include/asm/
H A Dasm.h11 * Copyright (C) 2002 Maciej W. Rozycki
55 #define REG_L ld.w
56 #define REG_S st.w
57 #define REG_ADD add.w
58 #define REG_SUB sub.w
70 #define INT_ADD add.w
71 #define INT_ADDI addi.w
72 #define INT_SUB sub.w
73 #define INT_L ld.w
74 #define INT_S st.w
[all …]
/openbmc/qemu/tests/tcg/mips/include/
H A Dwrappers_msa.h172 DO_MSA__WD__WS(NLOC_W, nloc.w)
177 DO_MSA__WD__WS(NLZC_W, nlzc.w)
182 DO_MSA__WD__WS(PCNT_W, pcnt.w)
197 DO_MSA__WD__WS_WT(BINSL_W, binsl.w)
198 DO_MSA__WD__WD_WT(BINSL_W__DDT, binsl.w)
199 DO_MSA__WD__WS_WD(BINSL_W__DSD, binsl.w)
210 DO_MSA__WD__WS_WT(BINSR_W, binsr.w)
211 DO_MSA__WD__WD_WT(BINSR_W__DDT, binsr.w)
212 DO_MSA__WD__WS_WD(BINSR_W__DSD, binsr.w)
235 DO_MSA__WD__WS_WT(BCLR_W, bclr.w)
[all …]
/openbmc/qemu/scripts/
H A Dqom-cast-macro-clean-cocci-gen.py35 r'DECLARE_INSTANCE_CHECKER\((\w+),\W*(\w+),\W*TYPE_\w+\)',
36 r'DECLARE_OBJ_CHECKERS\((\w+),\W*\w+,\W*(\w+),\W*TYPE_\w+\)',
37 r'OBJECT_DECLARE_TYPE\((\w+),\W*\w+,\W*(\w+)\)',
38 r'OBJECT_DECLARE_SIMPLE_TYPE\((\w+),\W*(\w+)\)',
39 r'INTERFACE_CHECK\((\w+),\W*\(\w+\),\W*TYPE_(\w+)\)',
/openbmc/qemu/hw/display/
H A Dexynos4210_fimd.c109 #define IS_PALETTIZED_MODE(w) (w->wincon & 0xC) argument
111 #define WIN_BPP_MODE(w) ((w->wincon >> 2) & 0xF) argument
112 #define WIN_BPP_MODE_WITH_ALPHA(w) \ argument
113 (WIN_BPP_MODE(w) == 0xD || WIN_BPP_MODE(w) == 0xE)
117 #define FIMD_WINDOW_PROTECTED(s, w) ((s) & (1 << (10 + (w)))) argument
284 void (*draw_line)(Exynos4210fimdWindow *w, uint8_t *src, uint8_t *dst,
286 uint32_t (*get_alpha)(Exynos4210fimdWindow *w, uint32_t pix_a);
587 static uint32_t fimd_get_alpha_pix(Exynos4210fimdWindow *w, uint32_t pix_a) in fimd_get_alpha_pix() argument
593 fimd_get_alpha_pix_extlow(Exynos4210fimdWindow *w, uint32_t pix_a) in fimd_get_alpha_pix_extlow() argument
599 fimd_get_alpha_pix_exthigh(Exynos4210fimdWindow *w, uint32_t pix_a) in fimd_get_alpha_pix_exthigh() argument
[all …]
/openbmc/linux/drivers/net/wireless/intersil/hostap/
H A Dhostap_common.h27 #define HFA384X_RID_CNFWDSADDRESS1 0xFC11 /* AP f/w only */
28 #define HFA384X_RID_CNFWDSADDRESS2 0xFC12 /* AP f/w only */
29 #define HFA384X_RID_CNFWDSADDRESS3 0xFC13 /* AP f/w only */
30 #define HFA384X_RID_CNFWDSADDRESS4 0xFC14 /* AP f/w only */
31 #define HFA384X_RID_CNFWDSADDRESS5 0xFC15 /* AP f/w only */
32 #define HFA384X_RID_CNFWDSADDRESS6 0xFC16 /* AP f/w only */
33 #define HFA384X_RID_CNFMULTICASTPMBUFFERING 0xFC17 /* AP f/w only */
44 #define HFA384X_RID_CNFMAXASSOCSTA 0xFC2B /* AP f/w only */
47 #define HFA384X_RID_CNFHOSTAUTHENTICATION 0xFC2E /* AP f/w only */
52 #define HFA384X_RID_CNFAPPCFINFO 0xFC34 /* AP f/w only */
[all …]
/openbmc/linux/drivers/isdn/hardware/mISDN/
H A Dipac.h125 #define IPAC_MODEB 0x22 /* R/W */
131 #define IPAC_RAL1 0x28 /* R/W */
135 #define IPAC_CCR2 0x2C /* R/W */
140 #define IPAC_CCR1 0x2F /* R/W */
159 #define IPAC_CONF 0xC0 /* R/W */
163 #define IPAC_ACFG 0xC3 /* R/W */
164 #define IPAC_AOE 0xC4 /* R/W */
167 #define IPAC_PITA1 0xC6 /* R/W */
168 #define IPAC_PITA2 0xC7 /* R/W */
169 #define IPAC_POTA1 0xC8 /* R/W */
[all …]
/openbmc/linux/sound/soc/
H A Dsoc-dapm.c183 static bool dapm_dirty_widget(struct snd_soc_dapm_widget *w) in dapm_dirty_widget() argument
185 return !list_empty(&w->dirty); in dapm_dirty_widget()
188 static void dapm_mark_dirty(struct snd_soc_dapm_widget *w, const char *reason) in dapm_mark_dirty() argument
190 dapm_assert_locked(w->dapm); in dapm_mark_dirty()
192 if (!dapm_dirty_widget(w)) { in dapm_mark_dirty()
193 dev_vdbg(w->dapm->dev, "Marking %s dirty due to %s\n", in dapm_mark_dirty()
194 w->name, reason); in dapm_mark_dirty()
195 list_add_tail(&w->dirty, &w->dapm->card->dapm_dirty); in dapm_mark_dirty()
207 struct snd_soc_dapm_widget *w, enum snd_soc_dapm_direction dir) in dapm_widget_invalidate_paths() argument
214 dapm_assert_locked(w->dapm); in dapm_widget_invalidate_paths()
[all …]
/openbmc/qemu/host/include/i386/host/
H A Dbufferiszero.c.inc20 __m128i w = *(__m128i_u *)(buf + len - 16);
27 v |= e[-1]; w |= e[-2];
28 SSE_REASSOC_BARRIER(v, w);
29 v |= e[-3]; w |= e[-4];
30 SSE_REASSOC_BARRIER(v, w);
31 v |= e[-5]; w |= e[-6];
32 SSE_REASSOC_BARRIER(v, w);
33 v |= e[-7]; v |= w;
45 v = p[0]; w = p[1];
46 SSE_REASSOC_BARRIER(v, w);
[all …]
/openbmc/u-boot/arch/m68k/include/asm/
H A Dm5249.h40 #define MCFSIM_RSR 0x00 /* Reset Status reg (r/w) */
41 #define MCFSIM_SYPCR 0x01 /* System Protection reg (r/w) */
42 #define MCFSIM_SWIVR 0x02 /* SW Watchdog intr reg (r/w) */
43 #define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */
44 #define MCFSIM_MPARK 0x0c /* Bus master park register (r/w) */
46 #define MCFSIM_SIMR 0x00 /* SIM Config reg (r/w) */
47 #define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */
48 #define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */
49 #define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */
50 #define MCFSIM_ICR3 0x4f /* Intr Ctrl reg 3 (r/w) */
[all …]
/openbmc/linux/arch/x86/crypto/
H A Dsha1_ssse3_asm.S62 /* we keep window of 64 w[i]+K pre-calculated values in a circular buffer */
250 * RR does two rounds of SHA-1 back to back with W[] pre-calc
251 * t1 = F(b, c, d); e += w(i)
252 * e += t1; b <<= 30; d += w(i+1);
312 .set W, W0 define
320 .set W_minus_32, W
331 .set W_minus_04, W
332 .set W, W_minus_32 define
353 movdqa W_TMP1, W
364 * - calculating last 32 w[i] values in 8 XMM registers
[all …]
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target-con-set.h15 C_O0_I2(w, r)
18 C_O1_I1(w, r)
19 C_O1_I1(w, w)
20 C_O1_I1(w, wr)
29 C_O1_I2(w, 0, w)
30 C_O1_I2(w, w, w)
31 C_O1_I2(w, w, wN)
32 C_O1_I2(w, w, wO)
33 C_O1_I2(w, w, wZ)
34 C_O1_I3(w, w, w, w)

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