/openbmc/qemu/target/riscv/ |
H A D | vcrypto_helper.c | 430 static inline void vsha2ms_e32(uint32_t *vd, uint32_t *vs1, uint32_t *vs2) in vsha2ms_e32() argument 433 res[0] = sig1_sha256(vs1[H4(2)]) + vs2[H4(1)] + sig0_sha256(vd[H4(1)]) + in vsha2ms_e32() 435 res[1] = sig1_sha256(vs1[H4(3)]) + vs2[H4(2)] + sig0_sha256(vd[H4(2)]) + in vsha2ms_e32() 440 sig1_sha256(res[1]) + vs1[H4(0)] + sig0_sha256(vs2[H4(0)]) + vd[H4(3)]; in vsha2ms_e32() 447 static inline void vsha2ms_e64(uint64_t *vd, uint64_t *vs1, uint64_t *vs2) in vsha2ms_e64() argument 450 res[0] = sig1_sha512(vs1[2]) + vs2[1] + sig0_sha512(vd[1]) + vd[0]; in vsha2ms_e64() 451 res[1] = sig1_sha512(vs1[3]) + vs2[2] + sig0_sha512(vd[2]) + vd[1]; in vsha2ms_e64() 453 res[3] = sig1_sha512(res[1]) + vs1[0] + sig0_sha512(vs2[0]) + vd[3]; in vsha2ms_e64() 460 void HELPER(vsha2ms_vv)(void *vd, void *vs1, void *vs2, CPURISCVState *env, in HELPER() 472 vsha2ms_e32(((uint32_t *)vd) + i * 4, ((uint32_t *)vs1) + i * 4, in HELPER() [all …]
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H A D | vector_internals.h | 179 typedef void opivv2_fn(void *vd, void *vs1, void *vs2, int i); 182 static void do_##NAME(void *vd, void *vs1, void *vs2, int i) \ 184 TX1 s1 = *((T1 *)vs1 + HS1(i)); \ 189 void do_vext_vv(void *vd, void *v0, void *vs1, void *vs2, 195 void HELPER(NAME)(void *vd, void *v0, void *vs1, \ 199 do_vext_vv(vd, v0, vs1, vs2, env, desc, \
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H A D | vector_helper.c | 1085 void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ in RVVCALL() 1098 ETYPE s1 = *((ETYPE *)vs1 + H(i)); \ in RVVCALL() 1157 void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ 1169 ETYPE s1 = *((ETYPE *)vs1 + H(i)); \ 1293 void HELPER(NAME)(void *vd, void *v0, void *vs1, \ 1312 TS1 s1 = *((TS1 *)vs1 + HS1(i)); \ 1407 void HELPER(NAME)(void *vd, void *v0, void *vs1, void *vs2, \ 1420 ETYPE s1 = *((ETYPE *)vs1 + H(i)); \ 1891 static void do_##NAME(void *vd, void *vs1, void *vs2, int i) \ 1893 TX1 s1 = *((T1 *)vs1 + HS1(i)); \ [all …]
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H A D | vector_internals.c | 58 void do_vext_vv(void *vd, void *v0, void *vs1, void *vs2, in do_vext_vv() argument 77 fn(vd, vs1, vs2, i); in do_vext_vv()
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/openbmc/linux/drivers/pcmcia/ |
H A D | bcm63xx_pcmcia.c | 112 * floating, and CD[12] input while only VS1 is floating 125 /* VS1 float, VS2 float */ 128 /* VS1 grounded, VS2 float */ 131 /* VS1 grounded, VS2 grounded */ 134 /* VS1 tied to CD1, VS2 float */ 137 /* VS1 grounded, VS2 tied to CD2 */ 140 /* VS1 tied to CD2, VS2 grounded */ 143 /* VS1 float, VS2 grounded */ 146 /* VS1 float, VS2 tied to CD2 */ 149 /* VS1 float, VS2 tied to CD1 */ [all …]
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H A D | pxa2xx_sharpsl.c | 72 /* keep vs1,vs2 */ in sharpsl_pcmcia_socket_state()
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/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvv.c.inc | 376 * 3. Source (vs2, vs1) vector register number are multiples of LMUL. 379 static bool vext_check_sss(DisasContext *s, int vd, int vs1, int vs2, int vm) 382 require_align(vs1, s->lmul); 399 * 1. Source (vs2, vs1) vector register number are multiples of LMUL. 402 * register (vs2, vs1) group. 410 static bool vext_check_mss(DisasContext *s, int vd, int vs1, int vs2) 413 require_align(vs1, s->lmul); 414 if (vd != vs1) { 415 ret &= require_noover(vd, 0, vs1, s->lmul); 493 * 2. Source (vs2, vs1) vector register number are multiples of LMUL. [all …]
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/openbmc/linux/drivers/gpu/drm/meson/ |
H A D | meson_vpp.c | 22 * We exclude OSD2, VS1, VS1 and Preblend output
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/openbmc/linux/arch/arm/boot/dts/qcom/ |
H A D | pm8941.dtsi | 224 interrupt-names = "ocp-5vs1", "ocp-5vs2"; 233 pm8941_5vs1: 5vs1 {
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H A D | qcom-msm8974pro-samsung-klte.dts | 631 pma8084_5vs1: 5vs1 {};
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/openbmc/linux/Documentation/devicetree/bindings/regulator/ |
H A D | qcom,smd-rpm-regulator.yaml | 52 lvs3, 5vs1, 5vs2 68 l20, l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1
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H A D | mediatek,mt6357-regulator.yaml | 99 mt6357_vs1_reg: buck-vs1 { 100 regulator-name = "vs1";
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H A D | qcom,spmi-regulator.yaml | 239 - const: ocp-5vs1
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H A D | mt6358-regulator.txt | 100 regulator-name = "vs1";
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H A D | mt6359-regulator.yaml | 108 regulator-name = "vs1";
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt6357.dtsi | 45 mt6357_vs1_reg: buck-vs1 { 46 regulator-name = "vs1";
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H A D | mt6359.dtsi | 22 regulator-name = "vs1";
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H A D | mt6358.dtsi | 106 regulator-name = "vs1";
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/openbmc/linux/drivers/regulator/ |
H A D | mt6357-regulator.c | 352 MT6357_BUCK("buck-vs1", VS1, 1200000, 2787500, 12500,
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H A D | mt6358-regulator.c | 517 MT6358_BUCK("buck_vs1", VS1, 1000000, 2587500, 12500, 595 MT6366_BUCK("buck_vs1", VS1, 1000000, 2587500, 12500,
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H A D | mt6359-regulator.c | 473 MT6359_BUCK("buck_vs1", VS1, 800000, 2200000, 12500, 709 MT6359_BUCK("buck_vs1", VS1, 800000, 2200000, 12500,
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/openbmc/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 693 TCGReg vd, TCGReg vs2, TCGReg vs1) 695 tcg_out32(s, encode_v(opc, vd, vs1, vs2, true)); 727 TCGReg vs2, TCGReg vs1) 729 tcg_out32(s, encode_v(opc, vd, vs1, vs2, false)); 1559 /* vd[i] == v0.mask[i] ? vs1[i] : vs2[i] */
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/openbmc/linux/arch/powerpc/crypto/ |
H A D | poly1305-p10le_64.S | 31 # vs1 = [r1,.....] 330 # vs1 = [r1,...]
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H A D | aes-gcm-p10.S | 49 # vs1 - vs9 - round keys 111 # vs1 - vs9 - round keys
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/openbmc/sdbusplus/include/sdbusplus/async/stdexec/__detail/ |
H A D | __when_all.hpp | 176 // tuple<optional<tuple<Vs1...>>, optional<tuple<Vs2...>>, ...>
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