Searched full:vdd5v (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | wlf,arizona.yaml | 238 SPKVDDL-supply = <&vdd5v>;
239 SPKVDDR-supply = <&vdd5v>;
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| H A D | cirrus,madera.yaml | 260 SPKVDDL-supply = <&vdd5v>;
261 SPKVDDR-supply = <&vdd5v>;
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| /openbmc/linux/drivers/iio/adc/ |
| H A D | mxs-lradc-adc.c | 81 VREF_MV_BASE * 4, /* CH15 VDD5V */
99 VREF_MV_BASE * 4, /* CH15 VDD5V */
626 MXS_ADC_CHAN(15, IIO_VOLTAGE, "VDD5V"),
662 MXS_ADC_CHAN(15, IIO_VOLTAGE, "VDD5V"),
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| /openbmc/linux/drivers/hwmon/ |
| H A D | w83791d.c | 62 0x23, /* VDD5V in DataSheet */
75 0x31, /* VDD5V High Limit in DataSheet */
87 0x32, /* VDD5V Low Limit in DataSheet */
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| /openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/ |
| H A D | spl_power_init.c | 932 * TODO: Do not switch CPU clock to PLL if we are VDD5V is sourced in mxs_power_configure_power_source()
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