/openbmc/linux/arch/arm64/crypto/ |
H A D | aes-ce-core.S | 13 ld1 {v0.16b}, [x2] 22 1: aese v0.16b, v2.16b 23 aesmc v0.16b, v0.16b 25 aese v0.16b, v3.16b 26 aesmc v0.16b, v0.16b 29 aese v0.16b, v1.16b 30 aesmc v0.16b, v0.16b 33 aese v0.16b, v2.16b 34 eor v0.16b, v0.16b, v3.16b 35 st1 {v0.16b}, [x1] [all …]
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H A D | aes-ce-ccm-core.S | 19 ld1 {v0.16b}, [x0] /* load mac */ 30 eor v0.16b, v0.16b, v1.16b 42 3: aese v0.16b, v4.16b 43 aesmc v0.16b, v0.16b 45 aese v0.16b, v5.16b 46 aesmc v0.16b, v0.16b 49 aese v0.16b, v3.16b 50 aesmc v0.16b, v0.16b 53 aese v0.16b, v4.16b 55 eor v0.16b, v0.16b, v5.16b /* final round */ [all …]
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H A D | sm4-ce-core.S | 51 ld1 {v0.16b}, [x0]; 52 rev32 v0.16b, v0.16b; 59 eor v0.16b, v0.16b, v1.16b; 61 sm4ekey v0.4s, v0.4s, v24.4s; 62 sm4ekey v1.4s, v0.4s, v25.4s; 73 st1 {v0.16b-v3.16b}, [x1], #64; 83 tbl v23.16b, {v0.16b}, v24.16b 100 ld1 {v0.16b}, [x2]; 101 SM4_CRYPT_BLK(v0); 102 st1 {v0.16b}, [x1]; [all …]
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H A D | aes-modes.S | 26 encrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7 31 decrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7 37 encrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7 42 decrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7 62 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 pt blocks */ 66 st1 {v0.16b-v3.16b}, [x0], #64 73 ld1 {v0.16b}, [x1], #16 /* get next pt block */ 74 encrypt_block v0, w3, x2, x5, w6 75 st1 {v0.16b}, [x0], #16 92 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 ct blocks */ [all …]
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H A D | sm4-neon-core.S | 273 ld4 {v0.4s-v3.4s}, [x2], #64 276 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7) 278 st1 {v0.16b-v3.16b}, [x1], #64 291 ld4 {v0.4s-v3.4s}, [x2], #64 293 SM4_CRYPT_BLK4(v0, v1, v2, v3) 295 st1 {v0.16b-v3.16b}, [x1], #64 301 ld1 {v0.16b}, [x2], #16 308 transpose_4x4(v0, v1, v2, v3) 310 SM4_CRYPT_BLK4(v0, v1, v2, v3) 313 st1 {v0.16b}, [x1], #16 [all …]
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H A D | sm4-ce-gcm-core.S | 236 /* can be the same as input v0-v3 */ 237 #define RR1 v0 275 rev32 v0.16b, RZERO.16b 276 SM4_CRYPT_BLK_BE(v0) 279 rbit RH1.16b, v0.16b 322 ld1 {v0.16b-v3.16b}, [x2], #64 324 rbit v0.16b, v0.16b 335 eor RHASH.16b, RHASH.16b, v0.16b 357 ld1 {v0.16b}, [x2], #16 358 rbit v0.16b, v0.16b [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/core/ |
H A D | ioctl.c | 37 struct nvif_ioctl_nop_v0 v0; in nvkm_ioctl_nop() member 42 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in nvkm_ioctl_nop() 43 nvif_ioctl(object, "nop vers %lld\n", args->v0.version); in nvkm_ioctl_nop() 44 args->v0.version = NVIF_VERSION_LATEST; in nvkm_ioctl_nop() 75 struct nvif_ioctl_sclass_v0 v0; in nvkm_ioctl_sclass() member 81 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) { in nvkm_ioctl_sclass() 83 args->v0.version, args->v0.count); in nvkm_ioctl_sclass() 84 if (size != args->v0.count * sizeof(args->v0.oclass[0])) in nvkm_ioctl_sclass() 88 if (i < args->v0.count) { in nvkm_ioctl_sclass() 89 args->v0.oclass[i].oclass = oclass.base.oclass; in nvkm_ioctl_sclass() [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/ |
H A D | ctrl.c | 38 struct nvif_control_pstate_info_v0 v0; in nvkm_control_mthd_pstate_info() member 44 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in nvkm_control_mthd_pstate_info() 46 args->v0.version); in nvkm_control_mthd_pstate_info() 51 args->v0.count = clk->state_nr; in nvkm_control_mthd_pstate_info() 52 args->v0.ustate_ac = clk->ustate_ac; in nvkm_control_mthd_pstate_info() 53 args->v0.ustate_dc = clk->ustate_dc; in nvkm_control_mthd_pstate_info() 54 args->v0.pwrsrc = clk->pwrsrc; in nvkm_control_mthd_pstate_info() 55 args->v0.pstate = clk->pstate; in nvkm_control_mthd_pstate_info() 57 args->v0.count = 0; in nvkm_control_mthd_pstate_info() 58 args->v0.ustate_ac = NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE; in nvkm_control_mthd_pstate_info() [all …]
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H A D | user.c | 80 struct nv_device_info_v0 v0; in nvkm_udevice_info() member 96 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in nvkm_udevice_info() 97 nvif_ioctl(object, "device info vers %d\n", args->v0.version); in nvkm_udevice_info() 112 args->v0.platform = NV_DEVICE_INFO_V0_IGP; in nvkm_udevice_info() 117 args->v0.platform = NV_DEVICE_INFO_V0_PCI; in nvkm_udevice_info() 120 args->v0.platform = NV_DEVICE_INFO_V0_AGP; in nvkm_udevice_info() 123 args->v0.platform = NV_DEVICE_INFO_V0_PCIE; in nvkm_udevice_info() 126 args->v0.platform = NV_DEVICE_INFO_V0_SOC; in nvkm_udevice_info() 136 case NV_04: args->v0.family = NV_DEVICE_INFO_V0_TNT; break; in nvkm_udevice_info() 138 case NV_11: args->v0.family = NV_DEVICE_INFO_V0_CELSIUS; break; in nvkm_udevice_info() [all …]
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/openbmc/linux/arch/mips/include/asm/mach-cavium-octeon/ |
H A D | kernel-entry-init.h | 30 dmfc0 v0, CP0_CVMMEMCTL_REG 32 dins v0, $0, 0, 6 33 ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 34 dmtc0 v0, CP0_CVMMEMCTL_REG # Write the cavium mem control register 35 dmfc0 v0, CP0_CVMCTL_REG # Read the cavium control register 38 or v0, v0, 0x5001 39 xor v0, v0, 0x1001 43 and v0, v0, v1 44 ori v0, v0, (6 << 7) 64 or v0, v0, 0x2000 # Set IPREF bit. [all …]
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/openbmc/qemu/tests/tcg/xtensa/ |
H A D | fpu.h | 49 .macro test_op1_rm op, fr0, fr1, v0, r, sr 52 movfp \fr0, \v0 57 .macro test_op2_rm op, fr0, fr1, fr2, v0, v1, r, sr 60 movfp \fr0, \v0 66 .macro test_op3_rm op, fr0, fr1, fr2, fr3, v0, v1, v2, r, sr 69 movfp \fr0, \v0 76 .macro test_op1_ex op, fr0, fr1, v0, rm, r, sr 79 test_op1_rm \op, \fr0, \fr1, \v0, \r, \sr 82 test_op1_rm \op, \fr0, \fr1, \v0, \r, \sr 85 .macro test_op2_ex op, fr0, fr1, fr2, v0, v1, rm, r, sr [all …]
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/minio/minio/ |
H A D | modules.txt | 1 # github.com/charmbracelet/bubbletea v0.19.3 11 # github.com/goccy/go-json v0.8.1 13 # github.com/google/shlex v0.0.0-20191202100458-e7afc7fbc510 23 # github.com/mattn/go-ieproxy v0.0.1 25 # github.com/mattn/go-isatty v0.0.14 41 # github.com/minio/selfupdate v0.4.0 47 # github.com/pkg/xattr v0.4.4 55 # github.com/rjeczalik/notify v0.9.2 59 # github.com/secure-io/sio-go v0.3.1 65 # golang.org/x/crypto v0.0.0-20220525230936-793ad666bf5e [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
H A D | uoutp.c | 36 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_mst_vcpi() 38 if (!ior->func->dp || !ior->func->dp->vcpi || !nvkm_head_find(outp->disp, args->v0.head)) in nvkm_uoutp_mthd_dp_mst_vcpi() 41 ior->func->dp->vcpi(ior, args->v0.head, args->v0.start_slot, args->v0.num_slots, in nvkm_uoutp_mthd_dp_mst_vcpi() 42 args->v0.pbn, args->v0.aligned_pbn); in nvkm_uoutp_mthd_dp_mst_vcpi() 65 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_aux_pwr() 68 outp->dp.enabled = !!args->v0.state; in nvkm_uoutp_mthd_dp_aux_pwr() 79 if (argc < sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_hda_eld() 81 argc -= sizeof(args->v0); in nvkm_uoutp_mthd_hda_eld() 83 if (!ior->hda || !nvkm_head_find(outp->disp, args->v0.head)) in nvkm_uoutp_mthd_hda_eld() 88 if (argc && args->v0.data[0]) { in nvkm_uoutp_mthd_hda_eld() [all …]
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H A D | uconn.c | 38 args.v0.version = 0; in nvkm_uconn_uevent_aux() 39 args.v0.types = 0; in nvkm_uconn_uevent_aux() 41 args.v0.types |= NVIF_CONN_EVENT_V0_PLUG; in nvkm_uconn_uevent_aux() 43 args.v0.types |= NVIF_CONN_EVENT_V0_UNPLUG; in nvkm_uconn_uevent_aux() 45 args.v0.types |= NVIF_CONN_EVENT_V0_IRQ; in nvkm_uconn_uevent_aux() 47 return object->client->event(token, &args, sizeof(args.v0)); in nvkm_uconn_uevent_aux() 55 args.v0.version = 0; in nvkm_uconn_uevent_gpio() 56 args.v0.types = 0; in nvkm_uconn_uevent_gpio() 58 args.v0.types |= NVIF_CONN_EVENT_V0_PLUG; in nvkm_uconn_uevent_gpio() 60 args.v0.types |= NVIF_CONN_EVENT_V0_UNPLUG; in nvkm_uconn_uevent_gpio() [all …]
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/openbmc/linux/tools/testing/selftests/powerpc/math/ |
H A D | vmx_asm.S | 9 # Should be safe from C, only touches r4, r5 and v0,v1,v2 15 lvx v0,r5,r4 16 vcmpequd. v1,v0,v20 20 lvx v0,r5,r4 21 vcmpequd. v1,v0,v21 25 lvx v0,r5,r4 26 vcmpequd. v1,v0,v22 30 lvx v0,r5,r4 31 vcmpequd. v1,v0,v23 35 lvx v0,r5,r4 [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/ |
H A D | nouveau_usif.c | 55 struct nvif_ioctl_new_v0 v0; in usif_object_new() member 60 if ((ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) in usif_object_new() 63 switch (args->v0.oclass) { in usif_object_new() 70 struct nv_device_v0 v0; in usif_object_new() member 73 if ((ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) in usif_object_new() 76 args->v0.priv = false; in usif_object_new() 89 object->route = args->v0.route; in usif_object_new() 90 object->token = args->v0.token; in usif_object_new() 91 args->v0.route = NVDRM_OBJECT_USIF; in usif_object_new() 92 args->v0.token = (unsigned long)(void *)object; in usif_object_new() [all …]
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/openbmc/linux/arch/powerpc/crypto/ |
H A D | crc32-vpmsum_core.S | 101 vspltisw v0,-1 103 vsldoi mask_32bit,zeroes,v0,4 104 vsldoi mask_64bit,zeroes,v0,8 156 /* zero v0-v7 which will contain our checksums */ 157 vxor v0,v0,v0 256 vxor v0,v0,v8 313 vxor v0,v0,v8 347 vxor v0,v0,v8 363 vsldoi v0,v0,zeroes,4 393 vxor v16,v0,v8 [all …]
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/openbmc/qemu/tests/tcg/aarch64/ |
H A D | test-aes.c | 8 asm("ld1 { v0.16b }, [%1]\n\t" in test_SB_SR() 10 "aese v0.16b, v1.16b\n\t" in test_SB_SR() 11 "st1 { v0.16b }, [%0]" in test_SB_SR() 12 : : "r"(o), "r"(i) : "v0", "v1", "memory"); in test_SB_SR() 18 asm("ld1 { v0.16b }, [%1]\n\t" in test_MC() 19 "aesmc v0.16b, v0.16b\n\t" in test_MC() 20 "st1 { v0.16b }, [%0]" in test_MC() 21 : : "r"(o), "r"(i) : "v0", "memory"); in test_MC() 33 asm("ld1 { v0.16b }, [%1]\n\t" in test_ISB_ISR() 35 "aesd v0.16b, v1.16b\n\t" in test_ISB_ISR() [all …]
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/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ |
H A D | ummu.c | 61 struct nvif_mmu_heap_v0 v0; in nvkm_ummu_heap() member 66 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) { in nvkm_ummu_heap() 67 if ((index = args->v0.index) >= mmu->heap_nr) in nvkm_ummu_heap() 69 args->v0.size = mmu->heap[index].size; in nvkm_ummu_heap() 81 struct nvif_mmu_type_v0 v0; in nvkm_ummu_type() member 86 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) { in nvkm_ummu_type() 87 if ((index = args->v0.index) >= mmu->type_nr) in nvkm_ummu_type() 90 args->v0.heap = mmu->type[index].heap; in nvkm_ummu_type() 91 args->v0.vram = !!(type & NVKM_MEM_VRAM); in nvkm_ummu_type() 92 args->v0.host = !!(type & NVKM_MEM_HOST); in nvkm_ummu_type() [all …]
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H A D | uvmm.c | 49 struct nvif_vmm_pfnclr_v0 v0; in nvkm_uvmm_mthd_pfnclr() member 55 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) { in nvkm_uvmm_mthd_pfnclr() 56 addr = args->v0.addr; in nvkm_uvmm_mthd_pfnclr() 57 size = args->v0.size; in nvkm_uvmm_mthd_pfnclr() 77 struct nvif_vmm_pfnmap_v0 v0; in nvkm_uvmm_mthd_pfnmap() member 84 if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, true))) { in nvkm_uvmm_mthd_pfnmap() 85 page = args->v0.page; in nvkm_uvmm_mthd_pfnmap() 86 addr = args->v0.addr; in nvkm_uvmm_mthd_pfnmap() 87 size = args->v0.size; in nvkm_uvmm_mthd_pfnmap() 88 phys = args->v0.phys; in nvkm_uvmm_mthd_pfnmap() [all …]
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/openbmc/linux/drivers/gpu/drm/amd/amdkfd/ |
H A D | cwsr_trap_handler_gfx10.asm | 374 // Save v0 by itself since it requires only two SGPRs. 379 global_store_dword_addtid v0, [s_save_ttmps_lo, s_save_ttmps_hi] slc:1 glc:1 380 v_mov_b32 v0, 0x0 397 v_writelane_b32 v0, ttmp4, 0x4 398 v_writelane_b32 v0, ttmp5, 0x5 399 v_writelane_b32 v0, ttmp6, 0x6 400 v_writelane_b32 v0, ttmp7, 0x7 401 v_writelane_b32 v0, ttmp8, 0x8 402 v_writelane_b32 v0, ttmp9, 0x9 403 v_writelane_b32 v0, ttmp10, 0xA [all …]
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/openbmc/qemu/tests/qemu-iotests/ |
H A D | 085.out | 17 'snapshot-file':'TEST_DIR/1-snapshot-v0.IMGFMT', 19 Formatting 'TEST_DIR/1-snapshot-v0.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression… 25 'arguments': { 'snapshot-file':'TEST_DIR/1-snapshot-v0.IMGFMT', 43 'snapshot-file': 'TEST_DIR/2-snapshot-v0.IMGFMT' } }, 48 …/2-snapshot-v0.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=134… 55 'snapshot-file': 'TEST_DIR/3-snapshot-v0.IMGFMT' } }, 60 …/3-snapshot-v0.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=134… 67 'snapshot-file': 'TEST_DIR/4-snapshot-v0.IMGFMT' } }, 72 …/4-snapshot-v0.qcow2', fmt=qcow2 cluster_size=65536 extended_l2=off compression_type=zlib size=134… 79 'snapshot-file': 'TEST_DIR/5-snapshot-v0.IMGFMT' } }, [all …]
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/openbmc/qemu/tests/tcg/hexagon/ |
H A D | scatter_gather.c | 227 "v0 = vmem(%2 + #0)\n\t" in vector_scatter_16() 229 "vscatter(%0, m0, v0.h).h = v1\n\t" in vector_scatter_16() 232 : "m0", "v0", "v1", "memory"); in vector_scatter_16() 241 "v0 = vmem(%2 + #0)\n\t" in vector_scatter_16_acc() 243 "vscatter(%0, m0, v0.h).h += v1\n\t" in vector_scatter_16_acc() 246 : "m0", "v0", "v1", "memory"); in vector_scatter_16_acc() 255 "v0 = vmem(%0 + #0)\n\t" in vector_scatter_16_masked() 256 "q0 = vand(v0, r1)\n\t" in vector_scatter_16_masked() 258 "v0 = vmem(%3 + #0)\n\t" in vector_scatter_16_masked() 260 "if (q0) vscatter(%1, m0, v0.h).h = v1\n\t" in vector_scatter_16_masked() [all …]
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/openbmc/linux/arch/arm64/lib/ |
H A D | xor-neon.c | 19 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_2() local 24 v0 = veorq_u64(vld1q_u64(dp1 + 0), vld1q_u64(dp2 + 0)); in xor_arm64_neon_2() 30 vst1q_u64(dp1 + 0, v0); in xor_arm64_neon_2() 48 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_3() local 53 v0 = veorq_u64(vld1q_u64(dp1 + 0), vld1q_u64(dp2 + 0)); in xor_arm64_neon_3() 59 v0 = veorq_u64(v0, vld1q_u64(dp3 + 0)); in xor_arm64_neon_3() 65 vst1q_u64(dp1 + 0, v0); in xor_arm64_neon_3() 86 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_4() local 91 v0 = veorq_u64(vld1q_u64(dp1 + 0), vld1q_u64(dp2 + 0)); in xor_arm64_neon_4() 97 v0 = veorq_u64(v0, vld1q_u64(dp3 + 0)); in xor_arm64_neon_4() [all …]
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/openbmc/linux/lib/ |
H A D | siphash.c | 20 #define SIPROUND SIPHASH_PERMUTATION(v0, v1, v2, v3) 23 u64 v0 = SIPHASH_CONST_0; \ 31 v0 ^= key->key[0]; 37 v0 ^= b; \ 43 return (v0 ^ v1) ^ (v2 ^ v3); 57 v0 ^= m; in __siphash_aligned() 90 v0 ^= m; in __siphash_unaligned() 122 v0 ^= first; in siphash_1u64() 139 v0 ^= first; in siphash_2u64() 143 v0 ^= second; in siphash_2u64() [all …]
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