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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calc_auto.c40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument
43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation()
44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation()
45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
56 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation()
[all …]
/openbmc/linux/include/linux/atomic/
H A Datomic-instrumented.h21 * @v: pointer to atomic_t
23 * Atomically loads the value of @v with relaxed ordering.
27 * Return: The value loaded from @v.
30 atomic_read(const atomic_t *v) in atomic_read() argument
32 instrument_atomic_read(v, sizeof(*v)); in atomic_read()
33 return raw_atomic_read(v); in atomic_read()
38 * @v: pointer to atomic_t
40 * Atomically loads the value of @v with acquire ordering.
44 * Return: The value loaded from @v.
47 atomic_read_acquire(const atomic_t *v) in atomic_read_acquire() argument
[all …]
H A Datomic-long.h26 * @v: pointer to atomic_long_t
28 * Atomically loads the value of @v with relaxed ordering.
32 * Return: The value loaded from @v.
35 raw_atomic_long_read(const atomic_long_t *v) in raw_atomic_long_read() argument
38 return raw_atomic64_read(v); in raw_atomic_long_read()
40 return raw_atomic_read(v); in raw_atomic_long_read()
46 * @v: pointer to atomic_long_t
48 * Atomically loads the value of @v with acquire ordering.
52 * Return: The value loaded from @v.
55 raw_atomic_long_read_acquire(const atomic_long_t *v) in raw_atomic_long_read_acquire() argument
[all …]
H A Datomic-arch-fallback.h433 * @v: pointer to atomic_t
435 * Atomically loads the value of @v with relaxed ordering.
439 * Return: The value loaded from @v.
442 raw_atomic_read(const atomic_t *v) in raw_atomic_read() argument
444 return arch_atomic_read(v); in raw_atomic_read()
449 * @v: pointer to atomic_t
451 * Atomically loads the value of @v with acquire ordering.
455 * Return: The value loaded from @v.
458 raw_atomic_read_acquire(const atomic_t *v) in raw_atomic_read_acquire() argument
461 return arch_atomic_read_acquire(v); in raw_atomic_read_acquire()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_mode_vba_30.c397 struct vba_vars_st *v,
1855 struct vba_vars_st *v = &mode_lib->vba; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
1858 unsigned int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1865 v->WritebackDISPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1866 v->DISPCLKWithRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1867 v->DISPCLKWithoutRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1868 v->GlobalDPPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1870 v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] = dml_min3( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1871 v->ReturnBusWidth * v->DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1872 v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * v->DRAMChannelWidth, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_mode_vba_31.c1746 struct vba_vars_st *v = &mode_lib->vba; local
1754 if (!v->IgnoreViewportPositioning) {
1782 dml_print("DML::%s: IgnoreViewportPositioning = %d\n", __func__, v->IgnoreViewportPositioning);
1828 struct vba_vars_st *v = &mode_lib->vba; local
1863 MPDEBytesFrame = 128 * (v->GPUVMMaxPageTableLevels - 1);
1884 if (GPUVMEnable == true && v->GPUVMMaxPageTableLevels > 1) {
1898 ExtraDPDEBytesFrame = 128 * (v->GPUVMMaxPageTableLevels - 2);
2000 struct vba_vars_st *v = &mode_lib->vba; local
2007 int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb];
2009 v->WritebackDISPCLK = 0.0;
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c1766 struct vba_vars_st *v = &mode_lib->vba; local
1774 if (!v->IgnoreViewportPositioning) {
1802 dml_print("DML::%s: IgnoreViewportPositioning = %d\n", __func__, v->IgnoreViewportPositioning);
1848 struct vba_vars_st *v = &mode_lib->vba; local
1883 MPDEBytesFrame = 128 * (v->GPUVMMaxPageTableLevels - 1);
1904 if (GPUVMEnable == true && v->GPUVMMaxPageTableLevels > 1) {
1918 ExtraDPDEBytesFrame = 128 * (v->GPUVMMaxPageTableLevels - 2);
2020 struct vba_vars_st *v = &mode_lib->vba; local
2027 int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb];
2029 v->WritebackDISPCLK = 0.0;
[all …]
/openbmc/linux/drivers/media/platform/nxp/
H A Dimx-pxp.h19 #define BF_PXP_CTRL_SFTRST(v) \ argument
20 (((v) << 31) & BM_PXP_CTRL_SFTRST)
22 #define BF_PXP_CTRL_CLKGATE(v) \ argument
23 (((v) << 30) & BM_PXP_CTRL_CLKGATE)
25 #define BF_PXP_CTRL_RSVD4(v) \ argument
26 (((v) << 29) & BM_PXP_CTRL_RSVD4)
28 #define BF_PXP_CTRL_EN_REPEAT(v) \ argument
29 (((v) << 28) & BM_PXP_CTRL_EN_REPEAT)
31 #define BF_PXP_CTRL_ENABLE_ROTATE1(v) \ argument
32 (((v) << 27) & BM_PXP_CTRL_ENABLE_ROTATE1)
[all …]
/openbmc/linux/sound/soc/qcom/
H A Dlpass-lpaif-reg.h11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument
12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port))
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
68 #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ argument
69 (v->irq_reg_base + (addr) + v->irq_reg_stride * (port))
73 #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) argument
74 #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) argument
75 #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, (port)) argument
78 #define LPAIF_RXTX_IRQ_REG_ADDR(v, addr, port) \ argument
79 (v->rxtx_irq_reg_base + (addr) + v->rxtx_irq_reg_stride * (port))
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-vf610/
H A Dimx-regs.h131 #define DDRMC_CR02_DRAM_TINIT(v) ((v) & 0xffffff) argument
132 #define DDRMC_CR10_TRST_PWRON(v) (v) argument
133 #define DDRMC_CR11_CKE_INACTIVE(v) (v) argument
134 #define DDRMC_CR12_WRLAT(v) (((v) & 0x1f) << 8) argument
135 #define DDRMC_CR12_CASLAT_LIN(v) ((v) & 0x3f) argument
136 #define DDRMC_CR13_TRC(v) (((v) & 0xff) << 24) argument
137 #define DDRMC_CR13_TRRD(v) (((v) & 0xff) << 16) argument
138 #define DDRMC_CR13_TCCD(v) (((v) & 0x1f) << 8) argument
139 #define DDRMC_CR13_TBST_INT_INTERVAL(v) ((v) & 0x7) argument
140 #define DDRMC_CR14_TFAW(v) (((v) & 0x3f) << 24) argument
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mx5/
H A Dcrm_regs.h80 #define MXC_CCM_CCR_OSCNT(v) ((v) & 0xFF) argument
92 #define MXC_CCM_CCSR_STEP_SEL(v) (((v) & 0x3) << 7) argument
96 #define MXC_CCM_CCSR_PLL2_DIV_PODF(v) (((v) & 0x3) << 5) argument
100 #define MXC_CCM_CCSR_PLL3_DIV_PODF(v) (((v) & 0x3) << 3) argument
109 #define MXC_CCM_CACRR_ARM_PODF(v) ((v) & 0x7) argument
116 #define MXC_CCM_CBCDR_DDR_PODF(v) (((v) & 0x7) << 27) argument
122 #define MXC_CCM_CBCDR_EMI_PODF(v) (((v) & 0x7) << 22) argument
126 #define MXC_CCM_CBCDR_AXI_B_PODF(v) (((v) & 0x7) << 19) argument
130 #define MXC_CCM_CBCDR_AXI_A_PODF(v) (((v) & 0x7) << 16) argument
134 #define MXC_CCM_CBCDR_NFC_PODF(v) (((v) & 0x7) << 13) argument
[all …]
/openbmc/qemu/qapi/
H A Dqapi-visit-core.c27 void visit_complete(Visitor *v, void *opaque) in visit_complete() argument
29 assert(v->type != VISITOR_OUTPUT || v->complete); in visit_complete()
30 trace_visit_complete(v, opaque); in visit_complete()
31 if (v->complete) { in visit_complete()
32 v->complete(v, opaque); in visit_complete()
36 void visit_free(Visitor *v) in visit_free() argument
38 trace_visit_free(v); in visit_free()
39 if (v) { in visit_free()
40 v->free(v); in visit_free()
44 bool visit_start_struct(Visitor *v, const char *name, void **obj, in visit_start_struct() argument
[all …]
H A Dtrace-events4 visit_free(void *v) "v=%p"
5 visit_complete(void *v, void *opaque) "v=%p opaque=%p"
7 visit_start_struct(void *v, const char *name, void *obj, size_t size) "v=%p name=%s obj=%p size=%zu"
8 visit_check_struct(void *v) "v=%p"
9 visit_end_struct(void *v, void *obj) "v=%p obj=%p"
11 visit_start_list(void *v, const char *name, void *obj, size_t size) "v=%p name=%s obj=%p size=%zu"
12 visit_next_list(void *v, void *tail, size_t size) "v=%p tail=%p size=%zu"
13 visit_check_list(void *v) "v=%p"
14 visit_end_list(void *v, void *obj) "v=%p obj=%p"
16 visit_start_alternate(void *v, const char *name, void *obj, size_t size) "v=%p name=%s obj=%p size=…
[all …]
/openbmc/linux/arch/x86/lib/
H A Datomic64_386_32.S27 IRQ_SAVE v;
32 IRQ_RESTORE v; \
35 #define v %ecx macro
37 movl (v), %eax
38 movl 4(v), %edx
41 #undef v
43 #define v %esi macro
45 movl %ebx, (v)
46 movl %ecx, 4(v)
49 #undef v
[all …]
/openbmc/linux/drivers/media/platform/verisilicon/
H A Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
/openbmc/linux/arch/sh/mm/
H A Dflush-sh4.c16 reg_size_t aligned_start, v, cnt, end; in sh4__flush_wback_region() local
19 v = aligned_start & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
22 cnt = (end - v) / L1_CACHE_BYTES; in sh4__flush_wback_region()
25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
28 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
29 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
30 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
31 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
[all …]
/openbmc/linux/drivers/staging/media/sunxi/sun6i-isp/
H A Dsun6i_isp_reg.h21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument
33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
107 #define SUN6I_ISP_MODE_SHARP(v) (((v) << 17) & BIT(17)) argument
108 #define SUN6I_ISP_MODE_HIST(v) (((v) << 20) & GENMASK(21, 20)) argument
123 #define SUN6I_ISP_IN_CFG_STRIDE_DIV16(v) ((v) & GENMASK(10, 0)) argument
133 #define SUN6I_ISP_AE_CFG_LOW_BRI_TH(v) ((v) & GENMASK(11, 0)) argument
[all …]
/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_shift.S5 .macro test_shift prefix, dst, src, v, imm
6 \prefix\()_set \dst, \src, \v, \imm
7 \prefix\()_ver \dst, \v, \imm
10 .macro test_shift_sd prefix, v, imm
11 test_shift \prefix, a3, a2, \v, \imm
12 test_shift \prefix, a2, a2, \v, \imm
15 .macro tests_imm_shift prefix, v argument
16 test_shift_sd \prefix, \v, 1
17 test_shift_sd \prefix, \v, 2
18 test_shift_sd \prefix, \v, 7
[all …]
/openbmc/linux/arch/ia64/include/asm/
H A Datomic.h24 #define arch_atomic_read(v) READ_ONCE((v)->counter) argument
25 #define arch_atomic64_read(v) READ_ONCE((v)->counter) argument
27 #define arch_atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
28 #define arch_atomic64_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
32 ia64_atomic_##op (int i, atomic_t *v) \
38 CMPXCHG_BUGCHECK(v); \
39 old = arch_atomic_read(v); \
41 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \
47 ia64_atomic_fetch_##op (int i, atomic_t *v) \
53 CMPXCHG_BUGCHECK(v); \
[all …]
/openbmc/linux/tools/memory-model/
H A Dlinux-kernel.def10 WRITE_ONCE(X,V) { __store{once}(X,V); }
13 smp_store_release(X,V) { __store{release}(*X,V); }
15 rcu_assign_pointer(X,V) { __store{release}(X,V); }
17 smp_store_mb(X,V) { __store{once}(X,V); __fence{mb}; }
31 xchg(X,V) __xchg{mb}(X,V)
32 xchg_relaxed(X,V) __xchg{once}(X,V)
33 xchg_release(X,V) __xchg{release}(X,V)
34 xchg_acquire(X,V) __xchg{acquire}(X,V)
35 cmpxchg(X,V,W) __cmpxchg{mb}(X,V,W)
36 cmpxchg_relaxed(X,V,W) __cmpxchg{once}(X,V,W)
[all …]
/openbmc/linux/drivers/md/
H A Ddm-verity-target.c53 struct dm_verity *v; member
87 static sector_t verity_map_sector(struct dm_verity *v, sector_t bi_sector) in verity_map_sector() argument
89 return v->data_start + dm_target_offset(v->ti, bi_sector); in verity_map_sector()
98 static sector_t verity_position_at_level(struct dm_verity *v, sector_t block, in verity_position_at_level() argument
101 return block >> (level * v->hash_per_block_bits); in verity_position_at_level()
104 static int verity_hash_update(struct dm_verity *v, struct ahash_request *req, in verity_hash_update() argument
137 static int verity_hash_init(struct dm_verity *v, struct ahash_request *req, in verity_hash_init() argument
142 ahash_request_set_tfm(req, v->tfm); in verity_hash_init()
156 if (likely(v->salt_size && (v->version >= 1))) in verity_hash_init()
157 r = verity_hash_update(v, req, v->salt, v->salt_size, wait); in verity_hash_init()
[all …]
/openbmc/linux/drivers/gpu/host1x/hw/
H A Dhw_host1x01_uclass.h15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
[all …]
H A Dhw_host1x06_uclass.h15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0x3ff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
[all …]
H A Dhw_host1x04_uclass.h15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
[all …]
/openbmc/linux/drivers/iio/adc/
H A Dstm32-dfsdm.h52 #define DFSDM_CHCFGR1_SITP(v) FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v) argument
54 #define DFSDM_CHCFGR1_SPICKSEL(v) FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v) argument
56 #define DFSDM_CHCFGR1_SCDEN(v) FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v) argument
58 #define DFSDM_CHCFGR1_CKABEN(v) FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v) argument
60 #define DFSDM_CHCFGR1_CHEN(v) FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v) argument
62 #define DFSDM_CHCFGR1_CHINSEL(v) FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v) argument
64 #define DFSDM_CHCFGR1_DATMPX(v) FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v) argument
66 #define DFSDM_CHCFGR1_DATPACK(v) FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v) argument
68 #define DFSDM_CHCFGR1_CKOUTDIV(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTDIV_MASK, v) argument
70 #define DFSDM_CHCFGR1_CKOUTSRC(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTSRC_MASK, v) argument
[all …]

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