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/openbmc/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray-usb.dtsi17 usbphy0: usb-phy@0 { label
28 phys = <&usbphy0 1>, <&usbphy0 0>;
38 phys = <&usbphy0 0>, <&usbphy0 1>;
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx27-pdk.dts22 usbphy0: usbphy@0 { label
113 fsl,usbphy = <&usbphy0>;
H A Dimx27-phytec-phycore-som.dtsi37 usbphy0: usbphy@0 { label
308 fsl,usbphy = <&usbphy0>;
H A Dimx53-kp.dtsi195 &usbphy0 {
H A Dimx51.dtsi100 usbphy0: usbphy0 { label
289 fsl,usbphy = <&usbphy0>;
H A Dimx35.dtsi336 fsl,usbphy = <&usbphy0>;
401 usbphy0: usb-phy@0 { label
/openbmc/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx23.dtsi27 usbphy0 = &usbphy0;
605 usbphy0: usbphy@8007c000 { label
625 fsl,usbphy = <&usbphy0>;
H A Dimx23-olinuxino.dts90 usbphy0: usbphy@8007c000 { label
H A Dimx28-cfa10036.dts129 &usbphy0 {
H A Dimx28-duckbill.dts137 &usbphy0 {
H A Dimx23-evk.dts126 usbphy0: usbphy@8007c000 { label
H A Dimx28-sps1.dts148 &usbphy0 {
H A Dimx28-lwe.dtsi156 &usbphy0 {
H A Dimx28-duckbill-2.dts168 &usbphy0 {
H A Dimx28-apf28dev.dts203 &usbphy0 {
/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_stratix10.dtsi334 usbphy0: usbphy@0 { label
344 phys = <&usbphy0>;
355 phys = <&usbphy0>;
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dbrcm,stingray-usb-phy.txt16 usbphy0: usb-phy@0 {
H A Drockchip-usb-phy.yaml74 usbphy0: usb-phy@320 {
/openbmc/linux/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10.dtsi494 phys = <&usbphy0>;
508 phys = <&usbphy0>;
637 usbphy0: usbphy0 { label
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Drockchip,rk3399-cru.yaml30 - "clk_usbphy0_480m" - output clock of the pll in the usbphy0
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_cyclone5_chameleon96.dts124 &usbphy0 {
/openbmc/linux/arch/arm/boot/dts/nxp/vf/
H A Dvfxxx.dtsi27 usbphy0 = &usbphy0;
378 usbphy0: usbphy@40050800 { label
448 fsl,usbphy = <&usbphy0>;
/openbmc/linux/drivers/clk/nuvoton/
H A Dclk-ma35d1.c547 hws[USBPHY0] = ma35d1_clk_fixed("usbphy0", 480000000); in ma35d1_clocks_probe()
597 hws[USBD_GATE] = ma35d1_clk_gate(dev, "usbd_gate", "usbphy0", in ma35d1_clocks_probe()
599 hws[USBH_GATE] = ma35d1_clk_gate(dev, "usbh_gate", "usbphy0", in ma35d1_clocks_probe()
601 hws[HUSBH0_GATE] = ma35d1_clk_gate(dev, "husbh0_gate", "usbphy0", in ma35d1_clocks_probe()
603 hws[HUSBH1_GATE] = ma35d1_clk_gate(dev, "husbh1_gate", "usbphy0", in ma35d1_clocks_probe()
/openbmc/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi128 usbphy0: usbphy { label
525 phys = <&usbphy0>;
539 phys = <&usbphy0>;
/openbmc/linux/include/dt-bindings/clock/
H A Dnuvoton,ma35d1-clk.h47 #define USBPHY0 33 macro

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