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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712-evb.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
27 stdout-path = "serial0:921600n8";
30 cpus_fixed_vproc0: regulator-vproc-buck0 {
31 compatible = "regulator-fixed";
32 regulator-name = "vproc_buck0";
33 regulator-min-microvolt = <1000000>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dusb-nop-xceiv.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-nop-xceiv.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB NOP PHY
10 - Rob Herring <robh@kernel.org>
14 const: usb-nop-xceiv
19 clock-names:
22 clock-frequency: true
24 '#phy-cells':
[all …]
/openbmc/u-boot/doc/device-tree-bindings/phy/
H A Dsun4i-usb-phy.txt1 Allwinner sun4i USB PHY
2 -----------------------
5 - compatible : should be one of
6 * allwinner,sun4i-a10-usb-phy
7 * allwinner,sun5i-a13-usb-phy
8 * allwinner,sun6i-a31-usb-phy
9 * allwinner,sun7i-a20-usb-phy
10 * allwinner,sun8i-a23-usb-phy
11 * allwinner,sun8i-a33-usb-phy
12 * allwinner,sun8i-a83t-usb-phy
[all …]
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dqcom,usb-vbus-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/qcom,usb-vbus-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The Qualcomm PMIC VBUS output regulator driver
10 - Wesley Cheng <quic_wcheng@quicinc.com>
13 This regulator driver controls the VBUS output by the Qualcomm PMIC. This
14 regulator will be enabled in situations where the device is required to
18 - $ref: regulator.yaml#
23 - qcom,pm8150b-vbus-reg
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra124-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dallwinner,sun6i-a31-usb-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 USB PHY
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
18 const: allwinner,sun6i-a31-usb-phy
22 - description: PHY Control registers
[all …]
H A Dallwinner,sun8i-r40-usb-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-r40-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner R40 USB PHY
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
18 const: allwinner,sun8i-r40-usb-phy
22 - description: PHY Control registers
[all …]
H A Dallwinner,sun8i-h3-usb-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner H3 USB PHY
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
19 - allwinner,sun8i-h3-usb-phy
20 - allwinner,sun50i-h616-usb-phy
[all …]
H A Dallwinner,sun4i-a10-usb-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 USB PHY
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#phy-cells":
19 - allwinner,sun4i-a10-usb-phy
20 - allwinner,sun7i-a20-usb-phy
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-apalis-v1.2-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis-v1.2.dtsi"
13 compatible = "toradex,apalis-tk1-v1.2-eval", "toradex,apalis-tk1-eval",
14 "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
28 stdout-path = "serial0:115200n8";
40 hdmi-supply = <&reg_5v0>;
46 pex-perst-n-hog {
[all …]
H A Dtegra124-apalis-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis.dtsi"
13 compatible = "toradex,apalis-tk1-eval", "toradex,apalis-tk1",
27 stdout-path = "serial0:115200n8";
39 hdmi-supply = <&reg_5v0>;
45 pex-perst-n-hog {
46 gpio-hog;
[all …]
H A Dtegra30-apalis-eval.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-apalis.dtsi"
9 compatible = "toradex,apalis_t30-eval", "toradex,apalis_t30",
23 stdout-path = "serial0:115200n8";
46 hdmi-supply = <&reg_5v0>;
52 pex-perst-n-hog {
53 gpio-hog;
55 output-high;
[all …]
H A Dtegra30-apalis-v1.1-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-apalis-v1.1.dtsi"
9 compatible = "toradex,apalis_t30-v1.1-eval", "toradex,apalis_t30-eval",
10 "toradex,apalis_t30-v1.1", "toradex,apalis_t30",
24 stdout-path = "serial0:115200n8";
47 hdmi-supply = <&reg_5v0>;
53 pex-perst-n-hog {
54 gpio-hog;
[all …]
H A Dtegra30-colibri-eval-v3.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra30-colibri.dtsi"
9 compatible = "toradex,colibri_t30-eval-v3", "toradex,colibri_t30",
22 stdout-path = "serial0:115200n8";
35 hdmi-supply = <&reg_5v0>;
39 /* Colibri UART-A */
41 /delete-property/ dmas;
42 /delete-property/ dma-names;
[all …]
H A Dtegra20-colibri-iris.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20-colibri.dtsi"
9 compatible = "toradex,colibri_t20-iris", "toradex,colibri_t20",
22 stdout-path = "serial0:115200n8";
35 hdmi-supply = <&reg_5v0>;
41 bl-on {
49 hotplug-detect {
85 uart-a {
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/supply/
H A Drichtek,rt9467.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
11 - ChiaEn Wu <chiaen_wu@richtek.com>
14 RT9467 is a switch-mode single cell Li-Ion/Li-Polymer battery charger for
16 MOSFETs, input current sensing and regulation, high-accuracy voltage
20 The RT9467 also features USB On-The-Go (OTG) support. It also integrates
21 D+/D- pin for USB host/charging port detection.
24 https://www.richtek.com/assets/product_file/RT9467/DS9467-01.pdf
[all …]
H A Dmt6360_charger.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gene Chen <gene_chen@richtek.com>
18 const: mediatek,mt6360-chg
20 richtek,vinovp-microvolt:
25 usb-otg-vbus-regulator:
27 description: OTG boost regulator.
28 $ref: /schemas/regulator/regulator.yaml#
32 - compatible
[all …]
H A Drichtek,rt9471.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alina Yu <alina_yu@richtek.com>
11 - ChiYuan Huang <cy_huang@richtek.com>
14 RT9471 is a switch-mode single cell Li-Ion/Li-Polymer battery charger for
15 portable applications. It supports USB BC1.2 port detection, current and
19 https://www.richtek.com/assets/product_file/RT9471=RT9471D/DS9471D-02.pdf
28 charge-enable-gpios:
32 wakeup-source: true
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra234-p3740-0002.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/sound/rt5640.h>
6 compatible = "nvidia,p3740-0002";
15 dai-format = "i2s";
16 remote-endpoint = <&rt5640_ep>;
26 bitclock-master;
27 frame-master;
36 rt5640: audio-codec@1c {
39 interrupt-parent = <&gpio>;
42 clock-names = "mclk";
[all …]
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include "armada-8040.dtsi"
13 compatible = "marvell,armada8040-db", "marvell,armada8040",
14 "marvell,armada-ap806-quad", "marvell,armada-ap806";
17 stdout-path = "serial0:115200n8";
34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
35 compatible = "regulator-fixed";
36 regulator-name = "cp0-usb3h0-vbus";
37 regulator-min-microvolt = <5000000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h616-orangepi-zero.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "sun50i-h616.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/leds/common.h>
22 stdout-path = "serial0:115200n8";
26 compatible = "gpio-leds";
28 led-0 {
32 default-state = "on";
35 led-1 {
[all …]
/openbmc/linux/drivers/usb/common/
H A Dusb-conn-gpio.c1 // SPDX-License-Identifier: GPL-2.0
3 * USB GPIO Based Connection Detection Driver
9 * Some code borrowed from drivers/extcon/extcon-usb-gpio.c
21 #include <linux/regulator/consumer.h>
22 #include <linux/usb/role.h>
34 struct regulator *vbus; member
49 * "DEVICE" = VBUS and "HOST" = !ID, so we have:
52 * even if VBUS is on.
54 * Role | ID | VBUS
55 * ------------------------------------
[all …]

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