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/openbmc/u-boot/drivers/serial/
H A Dserial_xuartlite.c25 struct uartlite { struct
33 struct uartlite *regs; argument
39 struct uartlite *regs = plat->regs; in uartlite_serial_putc()
52 struct uartlite *regs = plat->regs; in uartlite_serial_getc()
63 struct uartlite *regs = plat->regs; in uartlite_serial_pending()
74 struct uartlite *regs = plat->regs; in uartlite_serial_probe()
87 plat->regs = (struct uartlite *)devfdt_get_addr(dev); in uartlite_serial_ofdata_to_platdata()
99 { .compatible = "xlnx,opb-uartlite-1.00.b", },
100 { .compatible = "xlnx,xps-uartlite-1.00.a" },
120 struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE; in _debug_uart_init()
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/openbmc/u-boot/doc/device-tree-bindings/serial/
H A Dxilinx_uartlite.txt1 Binding for Xilinx Uartlite Controller
4 - compatible : should be "xlnx,xps-uartlite-1.00.a", or "xlnx,opb-uartlite-1.00.b"
10 compatible = "xlnx,xps-uartlite-1.00.a";
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dxlnx,opb-uartlite.yaml4 $id: http://devicetree.org/schemas/serial/xlnx,opb-uartlite.yaml#
7 title: Xilinx Axi Uartlite
16 - xlnx,xps-uartlite-1.00.a
17 - xlnx,opb-uartlite-1.00.b
80 compatible = "xlnx,xps-uartlite-1.00.a";
/openbmc/linux/drivers/tty/serial/
H A Duartlite.c3 * uartlite.c: Serial driver for Xilinx uartlite serial controller
292 "uartlite", port); in ulite_startup()
354 return port->type == PORT_UARTLITE ? "uartlite" : NULL; in ulite_type()
372 if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) { in ulite_request_port()
564 * set, or any other issue on the UARTLITE. in early_uartlite_putc()
595 EARLYCON_DECLARE(uartlite, early_uartlite_setup);
596 OF_EARLYCON_DECLARE(uartlite_b, "xlnx,opb-uartlite-1.00.b", early_uartlite_setup);
597 OF_EARLYCON_DECLARE(uartlite_a, "xlnx,xps-uartlite-1.00.a", early_uartlite_setup);
603 .driver_name = "uartlite",
617 /** ulite_assign: register a uartlite device with the driver
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H A DKconfig508 tristate "Xilinx uartlite serial port support"
512 Say Y here if you want to use the Xilinx uartlite serial controller.
515 module will be called uartlite.
518 bool "Support for console on Xilinx uartlite serial port"
523 Say Y here if you wish to use a Xilinx uartlite as the system
528 int "Maximum number of uartlite serial ports"
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dralink,rt2880-pinctrl.yaml38 enum: [gpio, i2c, spi, uartlite, jtag, mdio, sdram, pci]
57 enum: [i2c, spi, uartlite, jtag, mdio, sdram, pci]
80 const: uartlite
84 enum: [uartlite]
H A Dralink,rt305x-pinctrl.yaml40 uartlite]
59 enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf, uartlite]
181 const: uartlite
185 enum: [uartlite]
H A Dralink,rt5350-pinctrl.yaml39 pcm gpio, pcm i2s, pcm uartf, spi, spi_cs1, uartf, uartlite,
59 enum: [i2c, jtag, led, spi, spi_cs1, uartf, uartlite]
172 const: uartlite
176 enum: [uartlite]
H A Dralink,rt3352-pinctrl.yaml40 uartf, uartlite, wdg_cs1]
60 uartf, uartlite]
209 const: uartlite
213 enum: [uartlite]
H A Dralink,rt3883-pinctrl.yaml40 pcm gpio, pcm i2s, pcm uartf, spi, uartf, uartlite]
78 uartf, uartlite]
236 const: uartlite
240 enum: [uartlite]
H A Dmediatek,mt7620-pinctrl.yaml40 refclk, rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite,
70 spi refclk, uartf, uartlite, wdt, wled]
246 const: uartlite
250 enum: [uartlite]
/openbmc/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-rt305x.c45 static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
71 GRP("uartlite", uartlite_grp, 1, RT305X_GPIO_MODE_UART1),
84 GRP("uartlite", uartlite_grp, 1, RT305X_GPIO_MODE_UART1),
100 GRP("uartlite", uartlite_grp, 1, RT305X_GPIO_MODE_UART1),
H A Dpinctrl-rt2880.c20 static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 7, 8) };
29 GRP("uartlite", uartlite_grp, 1, RT2880_GPIO_MODE_UART0),
H A Dpinctrl-rt3883.c53 static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
72 GRP("uartlite", uartlite_grp, 1, RT3883_GPIO_MODE_UART1),
H A Dpinctrl-mt7620.c57 static struct mtmips_pmx_func uartlite_grp[] = { FUNC("uartlite", 0, 15, 2) };
95 GRP("uartlite", uartlite_grp, 1, MT7620_GPIO_MODE_UART1),
/openbmc/linux/Documentation/devicetree/bindings/
H A Dxilinx.txt78 compatible = "xlnx,opb-uartlite-1.00.b";
121 iv) Xilinx Uartlite
123 Xilinx uartlite devices are simple fixed speed serial ports.
126 - current-speed : Baud rate of uartlite
/openbmc/qemu/include/hw/char/
H A Dxilinx_uartlite.h20 #define TYPE_XILINX_UARTLITE "xlnx.xps-uartlite"
/openbmc/qemu/hw/char/
H A Dxilinx_uartlite.c2 * QEMU model of Xilinx uartlite.
229 "xlnx.xps-uartlite", R_MAX * 4); in xilinx_uartlite_init()
/openbmc/linux/arch/mips/boot/dts/ralink/
H A Dmt7620a.dtsi49 uartlite@c00 {
H A Drt2880.dtsi49 uartlite@c00 {
H A Drt3883.dtsi49 uartlite@c00 {
H A Drt3050.dtsi49 uartlite@c00 {
/openbmc/linux/arch/sh/boot/dts/
H A Dj2_mimas_v2.dts89 compatible = "xlnx,xps-uartlite-1.00.a";
/openbmc/linux/drivers/clk/ralink/
H A Dclk-mtmips.c170 { CLK_PERIPH("300c00.uartlite", "bus") },
183 { CLK_PERIPH("10000c00.uartlite", "bus") },
196 { CLK_PERIPH("10000c00.uartlite", "periph") },
209 { CLK_PERIPH("10000c00.uartlite", "periph") },
/openbmc/u-boot/arch/mips/dts/
H A Dmt7628a.dtsi126 uart0: uartlite@c00 {

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