Home
last modified time | relevance | path

Searched full:uart0_tx (Results 1 – 25 of 27) sorted by relevance

12

/openbmc/linux/drivers/pinctrl/actions/
H A Dpinctrl-s700.c154 #define UART0_TX _GPIOC(27) macro
312 PINCTRL_PIN(UART0_TX, "uart0_tx"),
808 /* uart0_tx */
809 static unsigned int uart0_tx_mfp_pads[] = { UART0_TX };
1002 static unsigned int uart0_tx_drv_pads[] = { UART0_TX };
1606 static PAD_ST_CONF(UART0_TX, 0, 14, 1);
1674 static PAD_PULLCTL_CONF(UART0_TX, 1, 1, 1);
1757 [UART0_TX] = PAD_INFO_PULLCTL_ST(UART0_TX),
H A Dpinctrl-s900.c93 #define UART0_TX _GPIOB(13) macro
278 PINCTRL_PIN(UART0_TX, "uart0_tx"),
731 static unsigned int uart0_tx_mfp_pads[] = { UART0_TX };
837 static unsigned int uart0_rx_tx_drv_pads[] = { UART0_RX, UART0_TX };
876 static unsigned int uart0_rx_tx_sr_pads[] = { UART0_RX, UART0_TX };
1469 static PAD_PULLCTL_CONF(UART0_TX, 1, 2, 2);
1516 static PAD_ST_CONF(UART0_TX, 0, 14, 1);
1629 [UART0_TX] = PAD_INFO_PULLCTL_ST(UART0_TX),
H A Dpinctrl-s500.c121 #define UART0_TX _GPIOC(27) macro
267 PINCTRL_PIN(UART0_TX, "uart0_tx"),
703 static unsigned int uart0_tx_mfp_pads[] = { UART0_TX };
850 static unsigned int uart0_tx_drv_pads[] = { UART0_TX };
1390 static PAD_ST_CONF(UART0_TX, 0, 14, 1);
1466 static PAD_PULLCTL_CONF(UART0_TX, 1, 1, 1);
1568 [UART0_TX] = PAD_INFO_PULLCTL_ST(UART0_TX),
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-b3.dts98 * UART0_TX = Testpoint 66
/openbmc/linux/arch/arm/mach-spear/
H A Dspear300.c28 .bus_id = "uart0_tx",
H A Dspear310.c35 .bus_id = "uart0_tx",
H A Dspear320.c36 .bus_id = "uart0_tx",
H A Dspear6xx.c50 .bus_id = "uart0_tx",
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dactions,s700-pinctrl.txt73 sd1_cmd, sd1_clk, spi0_ss, spi0_miso, uart0_rx, uart0_tx,
H A Dactions,s500-pinctrl.yaml158 uart0_tx, i2c0_sclk, i2c0_sdata, sensor0_pclk,
H A Dactions,s900-pinctrl.txt74 uart0_tx, uart2_rx, uart2_tx, uart2_rtsb, uart2_ctsb,
/openbmc/linux/arch/arm/mach-s3c/
H A Dpl080.c34 .bus_id = "uart0_tx",
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1126-pinctrl.dtsi202 /* uart0_tx */
/openbmc/linux/arch/mips/alchemy/common/
H A Ddma.c81 { AU1000_UART0_PHYS_ADDR + 0x04, DMA_DW8 }, /* UART0_TX */
/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp-zcu100-revC.dts135 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
/openbmc/linux/arch/arm64/boot/dts/actions/
H A Ds900-bubblegum-96.dts141 "UART0_TX", /* GPIO_47, LSEC pin 5 */
/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620-hi4511.dts78 0x0f4 0x0 /* UART0_RX & UART0_TX */
84 0x0f4 0x1 /* UART0_RX & UART0_TX */
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-pocketbeagle.dts111 "P1.30 [UART0_TX]",
H A Dam335x-boneblue.dts487 "UART0_TX", /* E16 */
/openbmc/linux/drivers/gpio/
H A Dgpio-msc313.c416 #define SSD20XD_PINNAME_UART0_TX "uart0_tx"
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-qmx6.dtsi556 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 /* Q7[171] UART0_TX */
/openbmc/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-zcu100-revC.dts145 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-hikey.dts466 gpio-line-names = "[UART0_RX]", "[UART0_TX]",
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dapq8016-sbc.dts448 "[UART0_TX]", /* GPIO_0, LSEC pin 5 */
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-quartz64-a.dts730 * pin 12 - uart0_tx

12