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/openbmc/linux/drivers/pinctrl/actions/
H A Dpinctrl-s700.c153 #define UART0_RX _GPIOC(26) macro
311 PINCTRL_PIN(UART0_RX, "uart0_rx"),
781 /* uart0_rx */
782 static unsigned int uart0_rx_mfp_pads[] = { UART0_RX };
1000 static unsigned int uart0_rx_drv_pads[] = { UART0_RX };
1598 static PAD_ST_CONF(UART0_RX, 0, 29, 1);
1673 static PAD_PULLCTL_CONF(UART0_RX, 1, 2, 1);
1756 [UART0_RX] = PAD_INFO_PULLCTL_ST(UART0_RX),
H A Dpinctrl-s900.c92 #define UART0_RX _GPIOB(12) macro
277 PINCTRL_PIN(UART0_RX, "uart0_rx"),
715 static unsigned int uart0_rx_mfp_pads[] = { UART0_RX };
837 static unsigned int uart0_rx_tx_drv_pads[] = { UART0_RX, UART0_TX };
876 static unsigned int uart0_rx_tx_sr_pads[] = { UART0_RX, UART0_TX };
1468 static PAD_PULLCTL_CONF(UART0_RX, 1, 4, 2);
1505 static PAD_ST_CONF(UART0_RX, 0, 29, 1);
1628 [UART0_RX] = PAD_INFO_PULLCTL_ST(UART0_RX),
H A Dpinctrl-s500.c120 #define UART0_RX _GPIOC(26) macro
266 PINCTRL_PIN(UART0_RX, "uart0_rx"),
679 static unsigned int uart0_rx_mfp_pads[] = { UART0_RX };
848 static unsigned int uart0_rx_drv_pads[] = { UART0_RX };
1382 static PAD_ST_CONF(UART0_RX, 0, 29, 1);
1465 static PAD_PULLCTL_CONF(UART0_RX, 1, 2, 1);
1567 [UART0_RX] = PAD_INFO_PULLCTL_ST(UART0_RX),
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-b3.dts97 * UART0_RX = Testpoint 65
/openbmc/linux/arch/arm/mach-spear/
H A Dspear300.c22 .bus_id = "uart0_rx",
H A Dspear310.c29 .bus_id = "uart0_rx",
H A Dspear320.c30 .bus_id = "uart0_rx",
H A Dspear6xx.c44 .bus_id = "uart0_rx",
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dactions,s700-pinctrl.txt73 sd1_cmd, sd1_clk, spi0_ss, spi0_miso, uart0_rx, uart0_tx,
H A Dactions,s500-pinctrl.yaml157 spi0_sclk, spi0_ss, spi0_miso, spi0_mosi, uart0_rx,
H A Dactions,s900-pinctrl.txt73 spi0_sclk, spi0_ss, spi0_miso, spi0_mosi, uart0_rx,
/openbmc/linux/arch/arm/mach-s3c/
H A Dpl080.c39 .bus_id = "uart0_rx",
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1126-pinctrl.dtsi200 /* uart0_rx */
/openbmc/linux/arch/mips/alchemy/common/
H A Ddma.c82 { AU1000_UART0_PHYS_ADDR + 0x00, DMA_DW8 | DMA_DR }, /* UART0_RX */
/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp-zcu100-revC.dts135 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
/openbmc/linux/arch/arm64/boot/dts/actions/
H A Ds900-bubblegum-96.dts140 "UART0_RX", /* GPIO_46, LSEC pin 7 */
/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620-hi4511.dts78 0x0f4 0x0 /* UART0_RX & UART0_TX */
84 0x0f4 0x1 /* UART0_RX & UART0_TX */
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-pocketbeagle.dts110 "P1.32 [UART0_RX]",
H A Dam335x-boneblue.dts486 "UART0_RX", /* E15 */
/openbmc/linux/drivers/gpio/
H A Dgpio-msc313.c415 #define SSD20XD_PINNAME_UART0_RX "uart0_rx"
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-qmx6.dtsi555 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 /* Q7[177] UART0_RX */
/openbmc/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-zcu100-revC.dts145 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-hikey.dts466 gpio-line-names = "[UART0_RX]", "[UART0_TX]",
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dapq8016-sbc.dts449 "[UART0_RX]", /* GPIO_1, LSEC pin 7 */
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-quartz64-a.dts731 * pin 14 - uart0_rx

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