Searched +full:tegra20 +full:- +full:gr3d (Results 1 – 14 of 14) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/display/tegra/ |
H A D | nvidia,tegra20-gr3d.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr3d.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^gr3d@[0-9a-f]+$" 19 - nvidia,tegra20-gr3d 20 - nvidia,tegra30-gr3d 21 - nvidia,tegra114-gr3d [all …]
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H A D | nvidia,tegra20-host1x.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 13 description: The host1x top-level node defines a number of children, each 19 - enum: 20 - nvidia,tegra20-host1x 21 - nvidia,tegra30-host1x [all …]
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/openbmc/linux/drivers/gpu/drm/tegra/ |
H A D | gr3d.c | 1 // SPDX-License-Identifier: GPL-2.0-only 24 #include "gr3d.h" 40 struct gr3d { struct 53 static inline struct gr3d *to_gr3d(struct tegra_drm_client *client) in to_gr3d() argument 55 return container_of(client, struct gr3d, client); in to_gr3d() 61 struct drm_device *dev = dev_get_drvdata(client->host); in gr3d_init() 63 struct gr3d *gr3d = to_gr3d(drm); in gr3d_init() local 66 gr3d->channel = host1x_channel_request(client); in gr3d_init() 67 if (!gr3d->channel) in gr3d_init() 68 return -ENOMEM; in gr3d_init() [all …]
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H A D | drm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved. 27 #include <asm/dma-iommu.h> 76 struct drm_device *drm = old_state->dev; in tegra_atomic_commit_tail() 77 struct tegra_drm *tegra = drm->dev_private; in tegra_atomic_commit_tail() 79 if (tegra->hub) { in tegra_atomic_commit_tail() 108 return -ENOMEM; in tegra_drm_open() 110 idr_init_base(&fpriv->legacy_contexts, 1); in tegra_drm_open() 111 xa_init_flags(&fpriv->contexts, XA_FLAGS_ALLOC1); in tegra_drm_open() 112 xa_init(&fpriv->syncpoints); in tegra_drm_open() [all …]
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/openbmc/u-boot/doc/device-tree-bindings/gpu/ |
H A D | nvidia,tegra20-host1x.txt | 4 - compatible: "nvidia,tegra<chip>-host1x" 5 - reg: Physical base address and length of the controller's registers. 6 - interrupts: The interrupt outputs from the controller. 7 - #address-cells: The number of cells used to represent physical base addresses 9 - #size-cells: The number of cells used to represent the size of an address 11 - ranges: The mapping of the host1x address space to the CPU address space. 12 - clocks: Must contain one entry, for the module clock. 13 See ../clocks/clock-bindings.txt for details. 14 - resets: Must contain an entry for each entry in reset-names. 16 - reset-names: Must include the following entries: [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | tegra114.dtsi | 1 #include <dt-bindings/clock/tegra114-car.h> 2 #include <dt-bindings/gpio/tegra-gpio.h> 3 #include <dt-bindings/memory/tegra114-mc.h> 4 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 interrupt-parent = <&lic>; 14 compatible = "nvidia,tegra114-host1x", "simple-bus"; 20 reset-names = "host1x"; 22 #address-cells = <1>; 23 #size-cells = <1>; [all …]
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H A D | tegra20.dtsi | 1 #include <dt-bindings/clock/tegra20-car.h> 2 #include <dt-bindings/gpio/tegra-gpio.h> 3 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 compatible = "nvidia,tegra20"; 10 interrupt-parent = <&lic>; 13 compatible = "nvidia,tegra20-host1x", "simple-bus"; 19 reset-names = "host1x"; 21 #address-cells = <1>; 22 #size-cells = <1>; [all …]
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H A D | tegra30.dtsi | 1 #include <dt-bindings/clock/tegra30-car.h> 2 #include <dt-bindings/gpio/tegra-gpio.h> 3 #include <dt-bindings/memory/tegra30-mc.h> 4 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 interrupt-parent = <&lic>; 13 pcie-controller@00003000 { 14 compatible = "nvidia,tegra30-pcie"; 19 reg-names = "pads", "afi", "cs"; 22 interrupt-names = "intr", "msi"; [all …]
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra20.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra20-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra20-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/soc/tegra-pmc.h> 9 #include "tegra20-peripherals-opp.dtsi" 12 compatible = "nvidia,tegra20"; 13 interrupt-parent = <&lic>; [all …]
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H A D | tegra114.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra114-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra114-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/soc/tegra-pmc.h> 11 interrupt-parent = <&lic>; 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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H A D | tegra30.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra30-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra30-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/soc/tegra-pmc.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra30-peripherals-opp.dtsi" 14 interrupt-parent = <&lic>; [all …]
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/openbmc/linux/Documentation/gpu/ |
H A D | tegra.rst | 11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting 15 The drm/tegra driver supports NVIDIA Tegra SoC generations since Tegra20. It 18 - A host1x driver that provides infrastructure and access to the host1x 21 - A KMS driver that supports the display controllers as well as a number of 24 - A set of custom userspace IOCTLs that can be used to submit jobs to the 40 device using a driver-provided function which will set up the bits specific to 48 ------------------------------- 50 .. kernel-doc:: include/linux/host1x.h 52 .. kernel-doc:: drivers/gpu/host1x/bus.c 56 -------------------------- [all …]
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/openbmc/linux/ |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |