| /openbmc/linux/Documentation/devicetree/bindings/arm/keystone/ |
| H A D | ti,sci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI controller
10 - Nishanth Menon <nm@ti.com>
15 management of the System on Chip (SoC) system. These include various system
18 An example of such an SoC is K2G, which contains the system control hardware
19 block called Power Management Micro Controller (PMMC). This hardware block is
25 The TI-SCI node describes the Texas Instrument's System Controller entity node.
27 specific functionality such as clocks, power domain, reset or additional
[all …]
|
| /openbmc/linux/drivers/usb/typec/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
4 tristate "USB Type-C Support"
6 USB Type-C Specification defines a cable and connector for USB where
8 be Type-A plug on one end of the cable and Type-B plug on the other.
9 Determination of the host-to-device relationship happens through a
10 specific Configuration Channel (CC) which goes through the USB Type-C
12 Accessory Modes - Analog Audio and Debug - and if USB Power Delivery
16 USB Power Delivery Specification defines a protocol that can be used
18 partners. USB Power Delivery allows higher voltages then the normal
19 5V, up to 20V, and current up to 5A over the cable. The USB Power
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | max77620.txt | 1 MAX77620 Power management IC from Maxim Semiconductor.
4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
[all …]
|
| H A D | mediatek,mt8195-scpsys.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/mediatek,mt8195-scpsys.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek System Control Processor System
10 - MandyJH Liu <mandyjh.liu@mediatek.com>
13 MediaTek System Control Processor System (SCPSYS) has several
14 power management tasks. The tasks include MTCMOS power
20 - enum:
21 - mediatek,mt8167-scpsys
[all …]
|
| H A D | twl4030-power.txt | 1 Texas Instruments TWL family (twl4030) reset and power management module
3 The power management module inside the TWL family provides several facilities
4 to control the power resources, including power scripts. For now, the
5 binding only supports the complete shutdown of the system after poweroff.
8 - compatible : must be one of the following
9 "ti,twl4030-power"
10 "ti,twl4030-power-reset"
11 "ti,twl4030-power-idle"
12 "ti,twl4030-power-idle-osc-off"
14 The use of ti,twl4030-power-reset is recommended at least on
[all …]
|
| H A D | canaan,k210-sysctl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Canaan Kendryte K210 System Controller
10 - Damien Le Moal <dlemoal@kernel.org>
13 Canaan Inc. Kendryte K210 SoC system controller which provides a
14 register map for controlling the clocks, reset signals and pin power
20 - const: canaan,k210-sysctl
21 - const: syscon
[all …]
|
| H A D | ene-kb930.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/ene-kb930.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ENE KB930 Embedded Controller
10 This binding describes the ENE KB930 Embedded Controller attached to an
14 - Dmitry Osipenko <digetx@gmail.com>
16 $ref: /schemas/power/supply/power-supply.yaml
21 - enum:
22 - acer,a500-iconia-ec # Acer A500 Iconia tablet device
[all …]
|
| H A D | netronix,ntxec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Netronix Embedded Controller
10 - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
13 This EC is found in e-book readers of multiple brands (e.g. Kobo, Tolino), and
22 - description: The I2C address of the EC
24 system-power-controller:
26 description: See Documentation/devicetree/bindings/power/power-controller.txt
33 "#pwm-cells":
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/soc/ti/ |
| H A D | sci-pm-domain.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/sci-pm-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI-SCI generic power domain
10 - Nishanth Menon <nm@ti.com>
13 - $ref: /schemas/power/power-domain.yaml#
16 Some TI SoCs contain a system controller (like the Power Management Micro
17 Controller (PMMC) on Keystone 66AK2G SoC) that are responsible for controlling
19 between the host processor running an OS and the system controller happens
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/soc/imx/ |
| H A D | fsl,imx93-src.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX93 System Reset Controller
10 - Peng Fan <peng.fan@nxp.com>
13 The System Reset Controller (SRC) is responsible for the generation of
14 all the system reset signals and boot argument latching.
17 - Deals with all global system reset sources from other modules,
18 and generates global system reset.
[all …]
|
| /openbmc/linux/Documentation/driver-api/usb/ |
| H A D | persist.rst | 1 .. _usb-persist:
3 USB device persistence during system suspend
14 bus must continue to supply suspend current (around 1-5 mA). This
16 detect connect-change events (devices being plugged in or unplugged).
17 The technical term is "power session".
19 If a USB device's power session is interrupted then the system is
24 device plugged into the port. The system must assume the worst.
27 controller loses power during a system suspend, then when the system
28 wakes up all the devices attached to that controller are treated as
34 while the system was asleep and a new keyboard was plugged in when the
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/display/panel/ |
| H A D | panel-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
38 on the system (e.g. as an affixed label) or specified in the system's
43 non-descriptive information. For instance an LCD panel in a system that
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/power/ |
| H A D | power-controller.txt | 1 * Generic system power control capability
3 Power-management integrated circuits or miscellaneous hardware components are
4 sometimes able to control the system power. The device driver associated with these
6 it can be used to switch off the system. The corresponding device must have the
7 standard property "system-power-controller" in its device node. This property
8 marks the device as able to control the system power. In order to test if this
15 compatible = "active-semi,act8846";
16 system-power-controller;
|
| H A D | renesas,rcar-sysc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/renesas,rcar-sysc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car and RZ/G System Controller
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Magnus Damm <magnus.damm@gmail.com>
14 The R-Car (RZ/G) System Controller provides power management for the CPU
16 The power domain IDs for consumers are defined in header files::
17 include/dt-bindings/power/r8*-sysc.h
[all …]
|
| H A D | renesas,sysc-rmobile.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/renesas,sysc-rmobile.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Mobile System Controller
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Magnus Damm <magnus.damm@gmail.com>
14 The R-Mobile System Controller provides the following functions:
15 - Boot mode management,
16 - Reset generation,
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/ |
| H A D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-max-frequency: true
31 - enum:
32 # Acbel fsg032 power supply
33 - acbel,fsg032
34 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/soc/amlogic/ |
| H A D | amlogic,meson-gx-hhi-sysctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/amlogic/amlogic,meson-gx-hhi-sysctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Meson System Control registers
10 - Neil Armstrong <neil.armstrong@linaro.org>
15 - enum:
16 - amlogic,meson-gx-hhi-sysctrl
17 - amlogic,meson-gx-ao-sysctrl
18 - amlogic,meson-axg-hhi-sysctrl
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/firmware/ |
| H A D | fsl,scu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX System Controller Firmware (SCFW)
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The System Controller Firmware (SCFW) is a low-level system function
14 which runs on a dedicated Cortex-M core to provide power, clock, and
17 The AP communicates with the SC using a multi-ported MU module found
26 const: fsl,imx-scu
28 clock-controller:
[all …]
|
| /openbmc/u-boot/doc/device-tree-bindings/power/ |
| H A D | ti,sci-pm-domain.txt | 1 Texas Instruments TI SCI Generic Power Domain
4 Some TI SoCs contain a system controller (like the SYSFW, etc...) that is
6 Communication between the host processor running an OS and the system
7 controller happens through a protocol known as TI SCI [1].
18 --------------------
19 - compatible: Must be "ti,sci-pm-domain"
20 - #power-domain-cells: Must be 1 so that an id can be provided in each
24 ----------------
26 compatible = "ti,am654-system-controller";
28 k3_pds: power-controller {
[all …]
|
| /openbmc/linux/drivers/mfd/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
24 bool "Altera Arria10 DevKit System Resource chip"
29 Support for the Altera Arria10 DevKit MAX5 System Resource chip
32 power supply alarms (hwmon).
35 bool "Altera SOCFPGA System Manager"
39 Select this to get System Manager support for all Altera branded
40 SOCFPGAs. The SOCFPGA System Manager handles all SOCFPGAs by
45 tristate "Active-semi ACT8945A"
50 Support for the ACT8945A PMIC from Active-semi. This device
51 features three step-down DC/DC converters and four low-dropout
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/bus/ |
| H A D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
15 from i.MX8 System Controller Unit (SCU) which is used to control power,
16 clock and reset through the i.MX8 Distributed Slave System Controller (DSC).
18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
20 connected to the bus can be accessed. Also, the bus is part of a power
21 domain. The power domain needs to be enabled before the peripherals can
[all …]
|
| /openbmc/linux/drivers/platform/x86/intel/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
15 source "drivers/platform/x86/intel/uncore-frequency/Kconfig"
39 Some laptops require this driver for power button support.
50 Power Management Event (PME) to the Power Management Controller (PMC)
51 to wakeup the system. When this happens software needs to explicitly
56 called a "Virtual GPIO controller" in ACPI because it defines the
84 tristate "Intel Bay Trail Crystal Cove power source driver"
87 This option adds a power source driver for Crystal Cove PMICs
94 tristate "Intel Cherry Trail Dollar Cove TI power button driver"
98 This option adds a power button driver for Dollar Cove TI
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/soc/starfive/ |
| H A D | starfive,jh7110-syscon.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive JH7110 SoC system controller
10 - William Qiu <william.qiu@starfivetech.com>
13 The StarFive JH7110 SoC system controller provides register information such
19 - items:
20 - const: starfive,jh7110-sys-syscon
21 - const: syscon
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | cortina,gemini-pinctrl.txt | 1 Cortina Systems Gemini pin controller
3 This pin controller is found in the Cortina Systems Gemini SoC family,
4 see further arm/gemini.txt. It is a purely group-based multiplexing pin
5 controller.
7 The pin controller node must be a subnode of the system controller node.
10 - compatible: "cortina,gemini-pinctrl"
12 Subnodes of the pin controller contain pin control multiplexing set-up
15 Please refer to pinctrl-bindings.txt for generic pin multiplexing nodes
19 - skew-delay is supported on the Ethernet pins
20 - drive-strength with 4, 8, 12 or 16 mA as argument is supported for
[all …]
|
| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | immap_83xx.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2004-2011 Freescale Semiconductor, Inc.
32 * System configuration registers
47 u32 sgprl; /* System General Purpose Register Low */
48 u32 sgprh; /* System General Purpose Register High */
49 u32 spridr; /* System Part and Revision ID Register */
51 u32 spcr; /* System Priority Configuration Register */
52 u32 sicrl; /* System I/O Configuration Register Low */
53 u32 sicrh; /* System I/O Configuration Register High */
55 u32 sidcr0; /* System I/O Delay Configuration Register 0 */
[all …]
|