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/openbmc/linux/arch/openrisc/kernel/
H A Dentry.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
25 #include <asm/asm-offsets.h>
46 l.sw -8(r1),r2 /* store frame pointer */ ;\
47 l.sw -4(r1),r9 /* store return address */ ;\
50 l.addi r1,r1,-8 ;\
52 l.lwz r9,-4(r1) /* restore return address */ ;\
53 l.lwz r2,-8(r1) /* restore fp */ ;\
59 l.sw -12(r1),t1 /* save extra reg */ ;\
60 l.sw -8(r1),r2 /* store frame pointer */ ;\
[all …]
H A Dhead.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
26 #include <asm/asm-offsets.h>
30 l.movhi rd,hi(-KERNELBASE) ;\
73 #define EMERGENCY_PRINT_STORE_GPR4 l.sw 0x20(r0),r4
76 #define EMERGENCY_PRINT_STORE_GPR5 l.sw 0x24(r0),r5
79 #define EMERGENCY_PRINT_STORE_GPR6 l.sw 0x28(r0),r6
82 #define EMERGENCY_PRINT_STORE_GPR7 l.sw 0x2c(r0),r7
85 #define EMERGENCY_PRINT_STORE_GPR8 l.sw 0x30(r0),r8
88 #define EMERGENCY_PRINT_STORE_GPR9 l.sw 0x34(r0),r9
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/openbmc/linux/arch/x86/math-emu/
H A Derrors.c1 // SPDX-License-Identifier: GPL-2.0
2 /*---------------------------------------------------------------------------+
5 | The error handling functions for wm-FPU-emu |
9 | E-mail billm@jacobi.maths.monash.edu.au |
12 +---------------------------------------------------------------------------*/
14 /*---------------------------------------------------------------------------+
19 +---------------------------------------------------------------------------*/
27 #include "exception.h"
68 EXCEPTION(EX_Invalid);
126 printk("SW: backward compatibility\n"); in FPU_printall()
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/openbmc/u-boot/arch/microblaze/cpu/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
7 * Yasushi SHOJI <yashi@atmark-techno.com>
10 #include <asm-offsets.h>
31 addi r1, r1, -4 /* Decrement SP to top of memory */
34 addi r1, r0, CONFIG_SYS_INIT_SP_OFFSET - CONFIG_VAL(SYS_MALLOC_F_LEN)
39 addi r1, r1, -4 /* Decrement SP to top of memory */
41 /* Find-out if u-boot is running on BIG/LITTLE endian platform
46 * 4a) LITTLE endian - r10 contains 0x2 because it is the smallest
48 * 4b) BIG endian - r10 contains 0x0 because 0x2 offset is on addr 0x3
56 /* add opcode instruction for 32bit jump - 2 instruction imm & brai */
[all …]
/openbmc/linux/arch/parisc/math-emu/
H A Ddriver.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
5 * Floating-point emulation code
6 * Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
9 * linux/arch/math-emu/driver.c.c
14 * Copyright (C) 2001 Hewlett-Packard <bame@debian.org>
20 #include "math-emu.h"
25 #define extru(r,pos,len) (((r) >> (31-(pos))) & (( 1 << (len)) - 1))
29 /* Format of the floating-point exception registers. */
31 unsigned int exception : 6; member
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/openbmc/linux/drivers/net/ethernet/marvell/prestera/
H A Dprestera_devlink.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2019-2020 Marvell International Ltd. All rights reserved */
9 /* All driver-specific traps must be documented in
127 struct prestera_switch *sw; member
146 DEVLINK_TRAP_GENERIC(EXCEPTION, TRAP, _id, \
151 DEVLINK_TRAP_DRIVER(EXCEPTION, TRAP, DEVLINK_PRESTERA_TRAP_ID_##_id, \
356 struct prestera_switch *sw = devlink_priv(dl); in prestera_dl_info_get() local
360 sw->dev->fw_rev.maj, in prestera_dl_info_get()
361 sw->dev->fw_rev.min, in prestera_dl_info_get()
362 sw->dev->fw_rev.sub); in prestera_dl_info_get()
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/openbmc/linux/arch/mips/kernel/
H A Dgenex.S6 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
27 * General exception vector for all other CPUs.
30 * to fit into space reserved for the exception handler.
46 * General exception handler for CPUs with virtual coherency exception.
49 * exception) bytes to fit into space reserved for the exception handler.
74 * c0_badvaddr because after return from this exception handler the
75 * load / store will be re-executed.
79 li k1, -4 # Is this ...
88 sw k1, (k0)
99 sw k1, (k0)
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H A Dcps-vec-ns16550.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #include <asm/asm-offsets.h>
25 # define UART_S sw
32 * _mips_cps_putc() - write a character to the UART
45 * _mips_cps_puts() - write a string to the UART
46 * @a0: pointer to NULL-terminated ASCII string
49 * Write a null-terminated ASCII string to the UART.
65 * _mips_cps_putx4 - write a 4b hex value to the UART
76 addiu a0, a0, -10
82 * _mips_cps_putx8 - write an 8b hex value to the UART
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/openbmc/linux/Documentation/devicetree/bindings/net/wireless/
H A Dqcom,ath11k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kalle Valo <kvalo@kernel.org>
20 - qcom,ipq8074-wifi
21 - qcom,ipq6018-wifi
22 - qcom,wcn6750-wifi
23 - qcom,ipq5018-wifi
32 interrupt-names:
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/openbmc/linux/arch/x86/include/asm/
H A Dtdx.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2021-2022 Intel Corporation */
14 * SW-defined error codes.
26 * Used by the #VE exception handler to gather the #VE exception
72 return -ENODEV; in tdx_kvm_hypercall()
/openbmc/linux/arch/mips/dec/prom/
H A Dlocore.S1 /* SPDX-License-Identifier: GPL-2.0 */
12 * Simple general exception handling routine. This one is used for the
23 sw k0, 0(k1)
/openbmc/u-boot/arch/mips/cpu/
H A Dstart.S1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Startup Code for MIPS32 CPU-core
8 #include <asm-offsets.h>
49 li t9, 15 # UHI exception operation
55 li t0, -16
78 PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset
83 /* U-Boot entry point */
89 * Store some board-specific boot configuration. This is used by some
99 * Exception vector entry points. When running from ROM, an exception
112 /* Cache error exception */
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/openbmc/linux/arch/ia64/kernel/
H A Dunaligned.c1 // SPDX-License-Identifier: GPL-2.0
3 * Architecture-specific unaligned trap handling.
5 * Copyright (C) 1999-2002, 2004 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
9 * 2002/12/09 Fix rotating register handling (off-by-1 error, missing fr-rotation). Fix
10 * get_rse_reg() to not leak kernel bits to user-level (reading an out-of-frame
28 #include <asm/exception.h>
69 * For M-unit:
72 * --------|------|---------|
73 * [40-37] | [36] | [35:30] |
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/openbmc/linux/drivers/platform/loongarch/
H A Dloongson-laptop.c1 // SPDX-License-Identifier: GPL-2.0
3 * Generic Loongson processor based LAPTOP/ALL-IN-ONE driver
20 #include <linux/input/sparse-keymap.h>
26 /* 1. Driver-wide structs and misc. variables */
32 #define ACPI_LAPTOP_NAME "loongson-laptop"
143 return -EIO; in hotkey_status_get()
152 if (!sub_driver || !sub_driver->notify) in dispatch_acpi_notify()
154 sub_driver->notify(sub_driver, event); in dispatch_acpi_notify()
161 if (!*sub_driver->handle) in setup_acpi_notify()
164 sub_driver->device = acpi_fetch_acpi_dev(*sub_driver->handle); in setup_acpi_notify()
[all …]
/openbmc/linux/arch/arm/mach-berlin/
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0
5 * Antoine Ténart <antoine.tenart@free-electrons.com>
20 * There are two reset registers, one with self-clearing (SC)
21 * reset and one with non-self-clearing reset (NON_SC).
47 return -EFAULT; in berlin_boot_secondary()
51 * exception vector. in berlin_boot_secondary()
64 np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); in berlin_smp_prepare_cpus()
70 np = of_find_compatible_node(NULL, NULL, "marvell,berlin-cpu-ctrl"); in berlin_smp_prepare_cpus()
84 * in the reset exception vector. in berlin_smp_prepare_cpus()
89 * Write the secondary startup address into the SW reset address in berlin_smp_prepare_cpus()
[all …]
/openbmc/linux/arch/x86/kernel/cpu/mce/
H A Dinject.c1 // SPDX-License-Identifier: GPL-2.0-only
15 * Copyright (c) 2010-17: Borislav Petkov <bp@alien8.de>
48 SW_INJ = 0, /* SW injection, simply decode the error */
56 [SW_INJ] = "sw",
71 m->reg = val; \
85 *val = m->reg; \
100 /* Use the user provided IPID value on a sw injection. */
107 m->ipid = val; in inj_ipid_set()
119 m->cpuvendor = boot_cpu_data.x86_vendor; in setup_inj_struct()
120 m->time = ktime_get_real_seconds(); in setup_inj_struct()
[all …]
/openbmc/linux/arch/powerpc/mm/nohash/
H A Dtlb_low_64e.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2008-2009
15 #include <asm/asm-offsets.h>
17 #include <asm/exception-64e.h>
18 #include <asm/ppc-opcode.h>
21 #include <asm/feature-fixups.h>
36 * Note that, unlike non-bolted handlers, TLB_EXFRAME is not
95 /* We pre-test some combination of permissions to avoid double
116 rldicl. r10,r16,64-PGTABLE_EADDR_SIZE,PGTABLE_EADDR_SIZE+4
117 bne- dtlb_miss_fault_bolted /* Bail if fault addr is invalid */
[all …]
/openbmc/linux/drivers/edac/
H A Dcpc925_edac.c1 // SPDX-License-Identifier: GPL-2.0-only
34 #define CPC925_BIT(nr) (1UL << (CPC925_BITS_PER_REG - 1 - nr))
50 * "CPC925 Bridge and Memory Controller User Manual, SA14-2761-02".
57 * Processor Interface Exception Mask Register (APIMASK)
61 APIMASK_DART = CPC925_BIT(0), /* DART Exception */
64 APIMASK_STAT = CPC925_BIT(3), /* Status Exception */
65 APIMASK_DERR = CPC925_BIT(4), /* Data Error Exception */
66 APIMASK_ADRS0 = CPC925_BIT(5), /* Addressing Exception on PI0 */
67 APIMASK_ADRS1 = CPC925_BIT(6), /* Addressing Exception on PI1 */
83 * Processor Interface Exception Register (APIEXCP)
[all …]
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h2 * xtensa/config/core-isa.h -- HAL definitions that are dependent on Xtensa
10 Copyright (c) 1999-2020 Tensilica Inc.
34 //depot/dev/Homewood/Xtensa/SWConfig/hal/core-common.h.tph#24 - edit change 444323 (text+ko)
46 /*----------------------------------------------------------------------
48 ----------------------------------------------------------------------*/
50 #define XCHAL_HAVE_BE 0 /* big-endian byte ordering */
56 #define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */
57 #define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */
58 #define XCHAL_LOOP_BUFFER_SIZE 0 /* zero-ov. loop instr buffer size */
69 #define XCHAL_HAVE_ABSOLUTE_LITERALS 0 /* non-PC-rel (extended) L32R */
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/openbmc/openbmc/poky/meta/lib/patchtest/
H A Drepo.py1 # ex:ts=4:sw=4:sts=4:et
2 # -*- tab-width: 4; c-basic-offset: 4; indent-tabs-mode: nil -*-
8 # SPDX-License-Identifier: GPL-2.0-only
45 # create working branch. Use the '-B' flag so that we just
47 self.repo.git.execute(['git', 'checkout', '-B', self._workingbranch, self._commit])
51 # Check if patch can be merged using git-am
55 …self.repo.git.execute(['git', 'apply', '--check', os.path.abspath(self.patch.path)], with_exceptio…
72 except Exception as e:
79 self.repo.git.execute(['git', 'am', '--keep-cr', os.path.abspath(self.patch.path)])
84 self.repo.git.execute(['git', 'branch', '-D', self._workingbranch])
/openbmc/linux/arch/openrisc/include/asm/
H A Duaccess.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
25 #include <asm-generic/access_ok.h>
28 * These are the main single-value transfer routines. They automatically
43 * exception handling means that it's no longer "just"...)
66 long __pu_err = -EFAULT; \
79 case 4: __put_user_asm(x, ptr, retval, "l.sw"); break; \
109 : "r"(x), "r"(addr), "i"(-EFAULT), "0"(err))
113 "1: l.sw 0(%2),%1\n" \
114 "2: l.sw 4(%2),%H1\n" \
[all …]
/openbmc/linux/arch/m68k/fpsp040/
H A Dx_unfl.S4 | fpsp_unfl --- FPSP handler for underflow exception
7 | For 881/2 compatibility, sw must denormalize the intermediate
46 link %a6,#-LOCAL_SIZE
47 fsave -(%a7)
48 moveml %d0-%d1/%a0-%a1,USER_DA(%a6)
49 fmovemx %fp0-%fp3,USER_FP0(%a6)
56 | exception
73 moveml USER_DA(%a6),%d0-%d1/%a0-%a1
74 fmovemx USER_FP0(%a6),%fp0-%fp3
92 | Inexact enabled and reported, and we must take an inexact exception
[all …]
/openbmc/linux/arch/alpha/kernel/
H A Dsignal.c1 // SPDX-License-Identifier: GPL-2.0
7 * 1997-11-02 Modified for POSIX.1b signals by Richard Henderson
69 __get_user(new_ka.sa.sa_handler, &act->sa_handler) || in SYSCALL_DEFINE3()
70 __get_user(new_ka.sa.sa_flags, &act->sa_flags) || in SYSCALL_DEFINE3()
71 __get_user(mask, &act->sa_mask)) in SYSCALL_DEFINE3()
72 return -EFAULT; in SYSCALL_DEFINE3()
81 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || in SYSCALL_DEFINE3()
82 __put_user(old_ka.sa.sa_flags, &oact->sa_flags) || in SYSCALL_DEFINE3()
83 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask)) in SYSCALL_DEFINE3()
84 return -EFAULT; in SYSCALL_DEFINE3()
[all …]
/openbmc/u-boot/arch/m68k/cpu/mcf530x/
H A Dcpu_init.c1 // SPDX-License-Identifier: GPL-2.0+
18 * Corrupted Return PC in Exception Stack Frame
21 * exception stack frame. The problem is caused by a conflict between
43 out_be16(&csm->csar0, CONFIG_SYS_CS0_BASE); in init_csm()
44 out_be32(&csm->csmr0, CONFIG_SYS_CS0_MASK); in init_csm()
45 out_be16(&csm->cscr0, CONFIG_SYS_CS0_CTRL); in init_csm()
46 MCF5307_SP_ERR_FIX(CONFIG_SYS_CS0_BASE, csm->csmr0); in init_csm()
52 out_be16(&csm->csar1, CONFIG_SYS_CS1_BASE); in init_csm()
53 out_be32(&csm->csmr1, CONFIG_SYS_CS1_MASK); in init_csm()
54 out_be16(&csm->cscr1, CONFIG_SYS_CS1_CTRL); in init_csm()
[all …]
/openbmc/linux/arch/arm/include/asm/
H A Duaccess-asm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 #include <asm/asm-offsets.h>
21 adds \tmp, \addr, #\size - 1
34 subs \tmp, \tmp, \addr @ tmp = limit - 1 - addr
36 subshs \tmp, \tmp, \size @ tmp = limit - (addr + size) }
45 * Whenever we re-enter userspace, the domains should always be
59 * Whenever we re-enter userspace, the domains should always be
77 * Save the address limit on entry to a privileged exception.
83 * If we are using SW PAN, set the DACR user domain to no access

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