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/openbmc/linux/Documentation/devicetree/bindings/leds/
H A Dmaxim,max77693.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
16 There are two LED outputs available - FLED1 and FLED2. Each of them can
26 const: maxim,max77693-led
28 maxim,boost-mode:
34 See LEDS_BOOST_* in include/dt-bindings/leds/common.h.
38 maxim,boost-mvout:
41 Valid values: 3300 - 5500, step by 25 (rounded down)
[all …]
/openbmc/linux/arch/x86/kvm/mmu/
H A Dtdp_iter.c1 // SPDX-License-Identifier: GPL-2.0
14 iter->sptep = iter->pt_path[iter->level - 1] + in tdp_iter_refresh_sptep()
15 SPTE_INDEX(iter->gfn << PAGE_SHIFT, iter->level); in tdp_iter_refresh_sptep()
16 iter->old_spte = kvm_tdp_mmu_read_spte(iter->sptep); in tdp_iter_refresh_sptep()
25 iter->yielded = false; in tdp_iter_restart()
26 iter->yielded_gfn = iter->next_last_level_gfn; in tdp_iter_restart()
27 iter->level = iter->root_level; in tdp_iter_restart()
29 iter->gfn = gfn_round_for_level(iter->next_last_level_gfn, iter->level); in tdp_iter_restart()
32 iter->valid = true; in tdp_iter_restart()
36 * Sets a TDP iterator to walk a pre-order traversal of the paging structure
[all …]
/openbmc/linux/sound/soc/fsl/
H A Dfsl_audmix.h1 /* SPDX-License-Identifier: GPL-2.0 */
20 #define FSL_AUDMIX_ATSTPUP0 0x210 /* Attenuation step up factor */
21 #define FSL_AUDMIX_ATSTPDN0 0x214 /* Attenuation step down factor */
22 #define FSL_AUDMIX_ATSTPTGT0 0x218 /* Attenuation step target */
24 #define FSL_AUDMIX_ATSTP0 0x220 /* Attenuation step number */
28 #define FSL_AUDMIX_ATSTPUP1 0x230 /* Attenuation step up factor */
29 #define FSL_AUDMIX_ATSTPDN1 0x234 /* Attenuation step down factor */
30 #define FSL_AUDMIX_ATSTPTGT1 0x238 /* Attenuation step target */
32 #define FSL_AUDMIX_ATSTP1 0x240 /* Attenuation step number */
79 /* AUDMIX Attenuation Step Up Factor Register */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dcs35l33.txt5 - compatible : "cirrus,cs35l33"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : gpio used to reset the amplifier
17 - interrupts : IRQ line info CS35L33.
18 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
21 - cirrus,boost-ctl : Booster voltage use to supply the amp. If the value is
23 a value of 1 and will increase at a step size of 100mV until a maximum of
26 - cirrus,ramp-rate : On power up, it affects the time from when the power
27 up sequence begins to the time the audio reaches a full-scale output.
[all …]
/openbmc/linux/drivers/regulator/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
38 managed regulators and simple non-configurable regulators.
65 They provide two I2C-controlled DC/DC step-down converters with
85 tristate "Active-semi act8865 voltage regulator"
90 This driver controls a active-semi act8865 voltage output
94 tristate "Active-semi ACT8945A voltage regulator"
97 This driver controls a active-semi ACT8945A voltage regulator
98 via I2C bus. The ACT8945A features three step-down DC/DC converters
99 and four low-dropout linear regulators, along with a ActivePath
110 tristate "Freescale i.MX on-chip ANATOP LDO regulators"
[all …]
/openbmc/qemu/hw/audio/
H A Dfmopl.h10 /* ---------- OPL one of slot ---------- */
14 uint8_t KSR; /* key scale rate :(shift down bit) */
19 uint8_t ksl; /* keyscale level :(shift down bits) */
23 uint32_t Incr; /* frequency step : */
29 int32_t evs; /* envelope counter step */
30 int32_t evsa; /* envelope step for AR :AR[ksr] */
31 int32_t evsd; /* envelope step for DR :DR[ksr] */
32 int32_t evsr; /* envelope step for RR :RR[ksr] */
40 /* ---------- OPL one of channel ---------- */
44 uint8_t FB; /* feed back :(shift down bit) */
[all …]
/openbmc/linux/drivers/staging/sm750fb/
H A Dddk750_sii164.c1 // SPDX-License-Identifier: GPL-2.0
79 * edge_select - Edge Select:
84 * bus_select - Input Bus Select:
85 * 0 = Input data bus is 12-bits wide
86 * 1 = Input data bus is 24-bits wide
87 * dual_edge_clk_select - Dual Edge Clock Select
90 * hsync_enable - Horizontal Sync Enable:
93 * vsync_enable - Vertical Sync Enable:
96 * deskew_enable - De-skewing Enable:
97 * 0 = De-skew disabled
[all …]
/openbmc/u-boot/drivers/power/
H A Dtps6586x.c1 // SPDX-License-Identifier: GPL-2.0+
36 int retval = -1; in tps6586x_read()
59 int retval = -1; in tps6586x_write()
85 * @return 0 if ok, -1 on error
98 if (ctrl1 == -1 || ctrl2 == -1) in read_voltages()
99 return -ENOTSUPP; in read_voltages()
105 if (*sm0 == -1 || *sm1 == -1) in read_voltages()
106 return -ENOTSUPP; in read_voltages()
119 * Only one supply is needed in u-boot. set both v1 and v2 to in set_voltage()
131 return -ENOTSUPP; in set_voltage()
[all …]
/openbmc/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mtk-common.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/pinctrl/pinconf-generic.h>
14 #include "mtk-eint.h"
61 #define SET_ADDR(x, y) (x + (y->devdata->port_align))
62 #define CLR_ADDR(x, y) (x + (y->devdata->port_align << 1))
71 * struct mtk_drv_group_desc - Provide driving group data.
76 * @step: The step current of this group.
83 unsigned char step; member
92 .step = _step, \
96 * struct mtk_pin_drv_grp - Provide each pin driving info.
[all …]
/openbmc/linux/block/
H A Dblk-wbt.c1 // SPDX-License-Identifier: GPL-2.0
6 * - Monitor latencies in a defined window of time.
7 * - If the minimum latency in the above window exceeds some target, increment
8 * scaling step and scale down queue depth by a factor of 2x. The monitoring
9 * window is then shrunk to 100 / sqrt(scaling step + 1).
10 * - For any window where we don't have solid data on what the latencies
12 * - If latencies look good, decrement scaling step.
13 * - If we're only doing writes, allow the scaling step to go negative. This
15 * scaling step of 0 if reads show up or the heavy writers finish. Unlike
17 * scaling step retains the default step==0 window size.
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8998-sony-xperia-yoshino-poplar.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include "msm8998-sony-xperia-yoshino.dtsi"
13 compatible = "sony,xperia-poplar", "qcom,msm8998";
14 chassis-type = "handset";
18 regulator-min-microvolt = <5600000>;
19 regulator-max-microvolt = <5600000>;
23 regulator-min-microvolt = <5600000>;
24 regulator-max-microvolt = <5600000>;
25 qcom,soft-start-us = <800>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dmaxim,max20411.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Maxim Integrated MAX20411 Step-Down DC-DC Converter
10 - Bjorn Andersson <andersson@kernel.org>
13 The MAX20411 is a high-efficiency, DC-DC step-down converter. It provides
18 - $ref: regulator.yaml#
27 enable-gpios:
30 vdd-supply:
34 - compatible
[all …]
H A Drichtek,rt5739.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Richtek RT5739 Step-Down Buck Converter
10 - ChiYuan Huang <cy_huang@richtek.com>
13 The RT5739 is a step-down switching buck converter that can deliver the
19 - $ref: regulator.yaml#
24 - richtek,rt5733
25 - richtek,rt5739
30 enable-gpios:
[all …]
H A Dvctrl.txt5 --------------------
6 - compatible : must be "vctrl-regulator".
7 - regulator-min-microvolt : smallest voltage consumers may set
8 - regulator-max-microvolt : largest voltage consumers may set
9 - ctrl-supply : The regulator supplying the control voltage.
10 - ctrl-voltage-range : an array of two integer values describing the range
13 regulator-min/max-microvolt output voltage.
16 --------------------
17 - ovp-threshold-percent : overvoltage protection (OVP) threshold of the
19 circuitry which shuts down the regulator when the
[all …]
/openbmc/linux/drivers/clk/tegra/
H A Dcvb.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2019 NVIDIA Corporation. All rights reserved.
20 mv = DIV_ROUND_CLOSEST(cvb->c2 * speedo, s_scale); in get_cvb_voltage()
21 mv = DIV_ROUND_CLOSEST((mv + cvb->c1) * speedo, s_scale) + cvb->c0; in get_cvb_voltage()
28 /* combined: apply voltage scale and round to cvb alignment step */ in round_cvb_voltage()
30 int step = (align->step_uv ? : 1000) * v_scale; in round_cvb_voltage() local
31 int offset = align->offset_uv * v_scale; in round_cvb_voltage()
33 uv = max(mv * 1000, offset) - offset; in round_cvb_voltage()
34 uv = DIV_ROUND_UP(uv, step) * align->step_uv + align->offset_uv; in round_cvb_voltage()
39 DOWN, enumerator
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/supply/
H A Dmaxim,max77693.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
21 const: maxim,max77693-charger
23 maxim,constant-microvolt:
30 Valid values: 3650000 - 4400000, step by 25000 (rounded down)
35 maxim,min-system-microvolt:
42 maxim,thermal-regulation-celsius:
50 maxim,battery-overcurrent-microamp:
[all …]
/openbmc/linux/Documentation/core-api/
H A Dcpu_hotplug.rst26 A more novel use of CPU-hotplug support is its use today in suspend resume
27 support for SMP. Dual-core and HT support makes even a laptop run SMP kernels
73 interrupts from devices. Its cleared when a CPU is brought down using
81 from the map depending on the event is hot-add/hot-remove. There are currently
86 be read-only for most use. When setting up per-cpu resources almost always use
100 $ ls -lh /sys/devices/system/cpu
102 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu0
103 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu1
104 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu2
105 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu3
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dstericsson,db8500-prcmu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/stericsson,db8500-prcmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DB8500 PRCMU - Power Reset and Control Management Unit
10 - Linus Walleij <linus.walleij@linaro.org>
13 The DB8500 Power Reset and Control Management Unit is an XP70 8-bit
14 microprocessor that is embedded in the always-on power domain of the
15 DB8500 SoCs to manage the low power states, powering up and down parts
20 pattern: '^prcmu@[0-9a-f]+$'
[all …]
/openbmc/linux/Documentation/input/devices/
H A Dsentelic.rst8 :Copyright: |copy| 2002-2011 Sentelic Corporation.
10 :Last update: Dec-07-2011
28 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
30 |---------------| |---------------| |---------------| |---------------|
40 Byte 2: X Movement(9-bit 2's complement integers)
41 Byte 3: Y Movement(9-bit 2's complement integers)
43 valid values, -8 ~ +7
51 - Set bit 1 in register 0x40 to 1
60 BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------|
62 |---------------| |---------------| |---------------| |---------------|
[all …]
/openbmc/linux/include/uapi/sound/
H A Dtlv.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
6 #define SNDRV_CTL_TLVT_CONTAINER 0 /* one level down - group of TLVs */
14 * channel-mapping TLV items
19 #define SNDRV_CTL_TLVT_CHMAP_PAIRED 0x103 /* pair-wise swappable */
23 * unsigned int type - see SNDRV_CTL_TLVT_*
26 * block_length = (length + (sizeof(unsigned int) - 1)) &
27 * ~(sizeof(unsigned int) - 1)) ....
47 #define SNDRV_CTL_TLVD_DB_SCALE_ITEM(min, step, mute) \ argument
50 ((step) & SNDRV_CTL_TLVD_DB_SCALE_MASK) | \
52 #define SNDRV_CTL_TLVD_DECLARE_DB_SCALE(name, min, step, mute) \ argument
[all …]
/openbmc/linux/include/linux/regulator/
H A Dtps51632-regulator.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * tps51632-regulator.h -- TPS51632 regulator
5 * Interface for regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down
17 * struct tps51632_regulator_platform_data - tps51632 regulator platform data.
21 * @dvfs_step_20mV: Step for DVFS is 20mV or 10mV.
22 * @max_voltage_uV: Maximum possible voltage in PWM-DVFS mode.
23 * @base_voltage_uV: Base voltage when PWM-DVFS enabled.
/openbmc/linux/net/dccp/
H A Dinput.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 /* rate-limit for syncs in reply to sequence-invalid packets; RFC 4340, 7.5.4 */
24 __skb_pull(skb, dccp_hdr(skb)->dccph_doff * 4); in dccp_enqueue_skb()
25 __skb_queue_tail(&sk->sk_receive_queue, skb); in dccp_enqueue_skb()
27 sk->sk_data_ready(sk); in dccp_enqueue_skb()
38 sk->sk_shutdown = SHUTDOWN_MASK; in dccp_fin()
47 switch (sk->sk_state) { in dccp_rcv_close()
50 * - CLOSED (may be a late or duplicate packet) in dccp_rcv_close()
51 * - PASSIVE_CLOSEREQ (the peer has sent a CloseReq earlier) in dccp_rcv_close()
52 * - RESPOND (already handled by dccp_check_req) in dccp_rcv_close()
[all …]
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-rf-tuner.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _rf-tuner-controls:
16 called Zero-IF tuners. Older tuners were typically simple PLL tuners
28 .. _rf-tuner-control-id:
47 range and step are driver-specific.
64 range and step are driver-specific.
71 differs from the each others. The range and step are
72 driver-specific.
76 located inside mixer block, where RF signal is down-converted by the
78 The range and step are driver-specific.
[all …]
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/mx6-ddr.h>
22 setbits_le32(&mmdc0->mpdgctrl0, 1 << 31); in reset_read_data_fifos()
23 wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0); in reset_read_data_fifos()
25 setbits_le32(&mmdc0->mpdgctrl0, 1 << 31); in reset_read_data_fifos()
26 wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0); in reset_read_data_fifos()
34 * Issue the Precharge-All command to the DDR device for both in precharge_all()
40 writel(0x04008050, &mmdc0->mdscr); in precharge_all()
41 wait_for_bit_le32(&mmdc0->mdscr, 1 << 14, 1, 100, 0); in precharge_all()
45 writel(0x04008058, &mmdc0->mdscr); in precharge_all()
[all …]
/openbmc/linux/drivers/net/wireless/intel/iwlegacy/
H A Dcsr.h8 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
70 * low power states due to driver-invoked device resets
71 * (e.g. CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
86 #define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */
100 * 31-8: Reserved
101 * 7-4: Type of device: see CSR_HW_REV_TYPE_xxx definitions
102 * 3-2: Revision step: 0 = A, 1 = B, 2 = C, 3 = D
103 * 1-0: "Dash" (-) value, as in A-1, etc.
[all …]

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