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/openbmc/linux/sound/soc/sh/rcar/
H A Dssiu.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car SSIU support
9 #define SSIU_NAME "ssiu"
13 u32 busif_status[8]; /* for BUSIF0 - BUSIF7 */
23 #define rsnd_ssiu_nr(priv) ((priv)->ssiu_nr)
28 ((pos) = ((struct rsnd_ssiu *)(priv)->ssiu + i)); \
33 * 0 BUSIF0-3 BUSIF0-7 BUSIF0-7
34 * 1 BUSIF0-3 BUSIF0-7
35 * 2 BUSIF0-3 BUSIF0-7
36 * 3 BUSIF0 BUSIF0-7
[all …]
H A Ddma.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car Audio DMAC support
53 #define rsnd_priv_to_dmac(p) ((struct rsnd_dma_ctrl *)(p)->dma)
55 #define rsnd_dma_to_dmaen(dma) (&(dma)->dma.en)
56 #define rsnd_dma_to_dmapp(dma) (&(dma)->dma.pp)
104 if (dmaen->chan) in rsnd_dmaen_stop()
105 dmaengine_terminate_async(dmaen->chan); in rsnd_dmaen_stop()
122 if (dmaen->chan) in rsnd_dmaen_cleanup()
123 dma_release_channel(dmaen->chan); in rsnd_dmaen_cleanup()
125 dmaen->chan = NULL; in rsnd_dmaen_cleanup()
[all …]
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 snd-soc-rcar-objs := core.o gen.o dma.o adg.o ssi.o ssiu.o src.o ctu.o mix.o dvc.o cmd.o debugfs.o
3 obj-$(CONFIG_SND_SOC_RCAR) += snd-soc-rcar.o
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car SRU/SCU/SSIU/SSI support
12 * Renesas R-Car sound device structure
17 * - SRC : Sampling Rate Converter
18 * - CMD
19 * - CTU : Channel Count Conversion Unit
20 * - MIX : Mixer
21 * - DVC : Digital Volume and Mute Function
22 * - SSI : Serial Sound Interface
27 * - SRC : Sampling Rate Converter
[all …]
H A Dssi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car SSIU/SSI support
107 ((pos) = ((struct rsnd_ssi *)(priv)->ssi + i)); \
110 #define rsnd_ssi_get(priv, id) ((struct rsnd_ssi *)(priv->ssi) + id)
111 #define rsnd_ssi_nr(priv) ((priv)->ssi_nr)
292 if (ssi->usrcnt > 0) { in rsnd_ssi_master_clk_start()
293 if (ssi->rate != rate) { in rsnd_ssi_master_clk_start()
295 return -EINVAL; in rsnd_ssi_master_clk_start()
298 if (ssi->chan != chan) { in rsnd_ssi_master_clk_start()
300 return -EINVAL; in rsnd_ssi_master_clk_start()
[all …]
H A Drsnd.h1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car
13 #include <linux/dma-mapping.h>
44 * The register address offsets SRU/SCU/SSIU on Gen1/Gen2 are very different.
157 /* SSIU */
263 * R-Car basic functions
273 * R-Car DMA
282 * R-Car sound mod
401 #define __rsnd_mod_add_quit -1 /* needs protect */
403 #define __rsnd_mod_add_stop -1 /* needs protect */
[all …]
H A Dgen.c1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas R-Car Gen1 SRU/SSI support
33 #define rsnd_priv_to_gen(p) ((struct rsnd_gen *)(p)->gen)
34 #define rsnd_reg_name(gen, id) ((gen)->reg_name[id])
64 if (!gen->regs[reg]) { in rsnd_is_accessible_reg()
76 if (mod->ops->id_cmd) in rsnd_mod_id_cmd()
77 return mod->ops->id_cmd(mod); in rsnd_mod_id_cmd()
92 regmap_fields_read(gen->regs[reg], rsnd_mod_id_cmd(mod), &val); in rsnd_mod_read()
94 dev_dbg(dev, "r %s - %-18s (%4d) : %08x\n", in rsnd_mod_read()
111 regmap_fields_force_write(gen->regs[reg], rsnd_mod_id_cmd(mod), data); in rsnd_mod_write()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Drenesas,rsnd.txt1 Renesas R-Car sound
7 Renesas R-Car and RZ/G sound is constructed from below modules
11 - SRC : Sampling Rate Converter
12 - CMD
13 - CTU : Channel Transfer Unit
14 - MIX : Mixer
15 - DVC : Digital Volume and Mute Function
16 SSIU : Serial Sound Interface Unit
25 Multi channel is supported by Multi-SSI, or TDM-SSI.
27 Multi-SSI : 6ch case, you can use stereo x 3 SSI
[all …]
H A Drenesas,rsnd.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Sound Driver
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
13 port-def:
14 $ref: audio-graph-port.yaml#/definitions/port-base
17 "^endpoint(@[0-9a-f]+)?":
18 $ref: audio-graph-port.yaml#/definitions/endpoint-base
21 $ref: /schemas/types.yaml#/definitions/phandle-array
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77961.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77961-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
[all …]
H A Dr8a774a1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774a1-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
[all …]
H A Dr8a77965.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
[all …]
H A Dr8a774b1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774b1-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
[all …]
H A Dr8a77960.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7796-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
[all …]
H A Dr8a774e1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774e1-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
[all …]
H A Dr8a77951.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H3 (R8A77951) SoC
8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7795-sysc.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
[all …]
H A Dr8a779g0.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC
8 #include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779g0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 /* External Audio clock - to be overridden by boards that provide it */
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
[all …]
H A Dr8a77995.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
[all …]
/openbmc/linux/sound/soc/sh/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
40 tristate "R-Car series SRU/SCU/SSIU/SSI support"
46 This option enables R-Car SRU/SCU/SSIU/SSI sound support
49 tristate "RZ/G2L series SSIF-2 support"
52 This option enables RZ/G2L SSIF-2 sound support.
68 tristate "SIU sound support on Migo-R"
73 This option enables sound support for the SH7722 Migo-R board
/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_lsc.S53 ssiu f5, a2, 8
57 l32i a4, a2, -8
60 l32i a4, a2, -4
125 l32i a4, a2, -8
128 l32i a4, a2, -4
193 l32i a4, a2, -16 + F64_HIGH_OFF
196 l32i a4, a2, -8 + F64_HIGH_OFF
248 l32i a4, a2, -16 + F64_HIGH_OFF
251 l32i a4, a2, -8 + F64_HIGH_OFF
/openbmc/linux/drivers/clk/renesas/
H A Dr8a779g0-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a779f0-cpg-mssr.c
12 #include <linux/clk-provider.h>
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen4-cpg.h"
197 DEF_MOD("rpc-if", 629, R8A779G0_CLK_RPCD2),
203 DEF_MOD("sys-dmac0", 709, R8A779G0_CLK_S0D6_PER),
204 DEF_MOD("sys-dmac1", 710, R8A779G0_CLK_S0D6_PER),
[all …]
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr8a7793.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-N (R8A77930) SoC
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7793-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
37 compatible = "fixed-clock";
[all …]
H A Dr8a7794.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E2 (R8A77940) SoC
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dr8a7793.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7793-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
[all …]
H A Dr8a7794.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
[all …]

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