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/openbmc/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_protocol_ops.h1 /* SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
14 * enum ipc_mem_td_cs - Completion status of a TD
15 * @IPC_MEM_TD_CS_INVALID: Initial status - td not yet used.
16 * @IPC_MEM_TD_CS_PARTIAL_TRANSFER: More data pending -> next TD used for this
33 * enum ipc_mem_msg_cs - Completion status of IPC Message
45 * struct ipc_msg_prep_args_pipe - struct for pipe args for message preparation
53 * struct ipc_msg_prep_args_sleep - struct for sleep args for message
56 * @state: 0=enter sleep, 1=exit sleep
64 * struct ipc_msg_prep_feature_set - struct for feature set argument for
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm6125.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
14 interrupt-parent = <&intc>;
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
H A Dmsm8994.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8994.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
14 interrupt-parent = <&intc>;
16 #address-cells = <2>;
[all …]
H A Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/qcom,rpmhpd.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
19 interrupt-parent = <&intc>;
[all …]
H A Dsc7280-chrome-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
20 /delete-node/ &hyp_mem;
21 /delete-node/ &xbl_mem;
22 /delete-node/ &reserved_xbl_uefi_log;
23 /delete-node/ &sec_apps_mem;
26 reserved-memory {
29 no-map;
34 no-map;
39 no-map;
44 no-map;
[all …]
H A Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
8 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/interconnect/qcom,sdm660.h>
12 #include <dt-bindings/power/qcom-rpmpd.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/soc/qcom,apr.h>
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8ulp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
12 compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp";
15 stdout-path = &lpuart5;
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
29 compatible = "shared-dma-pool";
32 linux,cma-default;
35 m33_reserved: noncacheable-section@a8600000 {
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bhupesh Sharma <bhupesh.sharma@linaro.org>
19 - enum:
20 - qcom,sdhci-msm-v4
22 - items:
23 - enum:
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-emstamp-argon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/mfd/st,stpmic1.h>
23 stdout-path = "serial0:115200n8";
31 reserved-memory {
32 #address-cells = <1>;
33 #size-cells = <1>;
37 compatible = "shared-dma-pool";
[all …]
H A Dstm32mp157c-phycore-stm32mp15-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
4 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/leds/leds-pca9532.h>
14 #include <dt-bindings/mfd/st,stpmic1.h>
[all …]
H A Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
28 compatible = "shared-dma-pool";
30 no-map;
34 compatible = "shared-dma-pool";
[all …]
H A Dstm32mp157c-ed1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/st,stpmic1.h>
17 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
24 stdout-path = "serial0:115200n8";
32 reserved-memory {
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dmpc8377_wlan.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2009 Freescale Semiconductor Inc.
9 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
[all …]
H A Dmpc8377_rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
[all …]
H A Dmpc8378_rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
35 i-cache-size = <32768>;
[all …]
/openbmc/linux/drivers/mtd/lpddr/
H A Dlpddr_cmds.c1 // SPDX-License-Identifier: GPL-2.0-or-later
31 static int get_chip(struct map_info *map, struct flchip *chip, int mode);
32 static int chip_ready(struct map_info *map, struct flchip *chip, int mode);
33 static void put_chip(struct map_info *map, struct flchip *chip);
35 struct mtd_info *lpddr_cmdset(struct map_info *map) in lpddr_cmdset() argument
37 struct lpddr_private *lpddr = map->fldrv_priv; in lpddr_cmdset()
47 mtd->priv = map; in lpddr_cmdset()
48 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
51 mtd->_read = lpddr_read; in lpddr_cmdset()
52 mtd->type = MTD_NORFLASH; in lpddr_cmdset()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/powerpc/
H A Dsleep.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/powerpc/sleep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerPC sleep property
10 - Rob Herring <robh@kernel.org>
13 Devices on SOCs often have mechanisms for placing devices into low-power
15 this information is more complicated than a cell-index property can
17 may contain a "sleep" property which describes these connections.
19 The sleep property consists of one or more sleep resources, each of
[all …]
/openbmc/linux/drivers/iio/imu/inv_icm42600/
H A Dinv_icm42600_buffer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
72 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
73 *gyro = &pack2->gyro; in inv_icm42600_fifo_decode_packet()
74 *temp = &pack2->temp; in inv_icm42600_fifo_decode_packet()
75 *timestamp = &pack2->timestamp; in inv_icm42600_fifo_decode_packet()
81 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
83 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
91 *gyro = &pack1->data; in inv_icm42600_fifo_decode_packet()
92 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
98 return -EINVAL; in inv_icm42600_fifo_decode_packet()
[all …]
H A Dinv_icm42600_gyro.c1 // SPDX-License-Identifier: GPL-2.0-or-later
92 /* 3-axis gyro + temperature */
106 unsigned int sleep; in inv_icm42600_gyro_update_scan_mode() local
109 mutex_lock(&st->lock); in inv_icm42600_gyro_update_scan_mode()
129 ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); in inv_icm42600_gyro_update_scan_mode()
132 mutex_unlock(&st->lock); in inv_icm42600_gyro_update_scan_mode()
133 /* sleep maximum required time */ in inv_icm42600_gyro_update_scan_mode()
135 sleep = sleep_gyro; in inv_icm42600_gyro_update_scan_mode()
137 sleep = sleep_temp; in inv_icm42600_gyro_update_scan_mode()
138 if (sleep) in inv_icm42600_gyro_update_scan_mode()
[all …]
H A Dinv_icm42600_accel.c1 // SPDX-License-Identifier: GPL-2.0-or-later
92 /* 3-axis accel + temperature */
106 unsigned int sleep; in inv_icm42600_accel_update_scan_mode() local
109 mutex_lock(&st->lock); in inv_icm42600_accel_update_scan_mode()
129 ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en); in inv_icm42600_accel_update_scan_mode()
132 mutex_unlock(&st->lock); in inv_icm42600_accel_update_scan_mode()
133 /* sleep maximum required time */ in inv_icm42600_accel_update_scan_mode()
135 sleep = sleep_accel; in inv_icm42600_accel_update_scan_mode()
137 sleep = sleep_temp; in inv_icm42600_accel_update_scan_mode()
138 if (sleep) in inv_icm42600_accel_update_scan_mode()
[all …]
/openbmc/linux/drivers/iio/imu/inv_mpu6050/
H A Dinv_mpu_core.c1 // SPDX-License-Identifier: GPL-2.0-only
288 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, in inv_mpu6050_pwr_mgmt_1_write() argument
294 clock = st->chip_config.clk; in inv_mpu6050_pwr_mgmt_1_write()
296 temp_dis = !st->chip_config.temp_en; in inv_mpu6050_pwr_mgmt_1_write()
301 if (sleep) in inv_mpu6050_pwr_mgmt_1_write()
304 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); in inv_mpu6050_pwr_mgmt_1_write()
305 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); in inv_mpu6050_pwr_mgmt_1_write()
313 switch (st->chip_type) { in inv_mpu6050_clock_switch()
318 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1); in inv_mpu6050_clock_switch()
321 st->chip_config.clk = clock; in inv_mpu6050_clock_switch()
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8568si-post.dtsi36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus", "simple-bus";
40 sleep = <&pmc 0x08000000>;
45 compatible = "fsl,mpc8540-pci";
48 bus-range = <0 0xff>;
49 #interrupt-cells = <1>;
50 #size-cells = <2>;
51 #address-cells = <3>;
52 sleep = <&pmc 0x80000000>;
[all …]
/openbmc/linux/include/drm/ttm/
H A Dttm_bo.h3 * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
28 * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
41 /* Default number of pre-faulted pages in the TTM fault handler */
62 * but they cannot be accessed from user-space. For kernel-only use.
166 * @interruptible: Sleep interruptible if sleeping.
189 * ttm_bo_get - reference a struct ttm_buffer_object
195 kref_get(&bo->kref); in ttm_bo_get()
199 * ttm_bo_get_unless_zero - reference a struct ttm_buffer_object unless
211 if (!kref_get_unless_zero(&bo->kref)) in ttm_bo_get_unless_zero()
[all …]
/openbmc/linux/drivers/reset/
H A Dreset-qcom-aoss.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/reset-controller.h>
12 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
54 const struct qcom_aoss_reset_map *map = &data->desc->resets[idx]; in qcom_aoss_control_assert() local
56 writel(1, data->base + map->reg); in qcom_aoss_control_assert()
57 /* Wait 6 32kHz sleep cycles for reset */ in qcom_aoss_control_assert()
66 const struct qcom_aoss_reset_map *map = &data->desc->resets[idx]; in qcom_aoss_control_deassert() local
68 writel(0, data->base + map->reg); in qcom_aoss_control_deassert()
69 /* Wait 6 32kHz sleep cycles for reset */ in qcom_aoss_control_deassert()
91 struct device *dev = &pdev->dev; in qcom_aoss_reset_probe()
[all …]
/openbmc/linux/arch/arm/mach-s3c/
H A Dsleep-s3c64xx.S1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* linux/arch/arm/plat-s3c64xx/sleep.S
9 * S3C64XX CPU sleep code
14 #include "map.h"
19 #include "regs-gpio.h"
25 /* Sleep magic, the word before the resume entry point so that the

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