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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dimx7ulp-scg-clock.yaml19 domains, such as the System Oscillator clock, the Slow IRC (SIRC),
62 - const: sirc
83 clocks = <&rosc>, <&sosc>, <&sirc>,
85 clock-names = "rosc", "sosc", "sirc",
H A Dimx7ulp-pcc-clock.yaml19 domains, such as the System Oscillator clock, the Slow IRC (SIRC),
/openbmc/linux/drivers/media/rc/img-ir/
H A Dimg-ir-sony.c3 * ImgTec IR Decoder setup for Sony (SIRC) protocol.
123 * Sony SIRC decoder
124 * See also http://www.sbprojects.com/knowledge/ir/sirc.php
125 * http://picprojects.org.uk/projects/sirc/sonysirc.pdf
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7ulp.dtsi69 sirc: clock-sirc { label
72 clock-output-names = "sirc";
250 clocks = <&rosc>, <&sosc>, <&sirc>,
252 clock-names = "rosc", "sosc", "sirc",
/openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dscg.h94 * FIRC/SIRC DIV1 ==> xIRC_PLAT_CLK
95 * FIRC/SIRC DIV2 ==> xIRC_BUS_CLK
96 * FIRC/SIRC DIV3 ==> xIRC_SLOW_CLK
/openbmc/linux/arch/hexagon/include/asm/
H A Dirq.h14 * 64 == the two SIRC's, 176 == the two gpio's
/openbmc/u-boot/arch/arm/dts/
H A Dimx7ulp.dtsi94 sirc: clock@2 { label
98 clock-output-names = "sirc";
375 clocks = <&ckil>, <&osc>, <&sirc>,
377 clock-names = "ckil", "osc", "sirc",
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx7ulp.c27 static const char * const scs_sels[] = { "dummy", "sosc", "sirc", "firc", "dummy", "apll_sel", "sp…
34 /* used by sosc/sirc/firc/ddr/spll/apll dividers */
64 hws[IMX7ULP_CLK_SIRC] = imx_get_clk_hw_by_name(np, "sirc"); in imx7ulp_clk_scg1_init()
/openbmc/u-boot/arch/arm/mach-imx/mx7ulp/
H A Dclock.c282 * A4 side: SIRC 16Mhz (DIV1-3 off), FIRC 48Mhz (DIV1-2 on), in clock_init()
/openbmc/linux/tools/perf/util/
H A Dsymbol.c1832 int sirc = -1; in dso__load() local
1864 sirc = symsrc__init(ss, dso, name, symtab_type); in dso__load()
1874 if (!is_reg || sirc < 0) in dso__load()