| /openbmc/qemu/docs/system/devices/ |
| H A D | ivshmem.rst | 1 Inter-VM Shared Memory device 2 ----------------------------- 4 On Linux hosts, a shared memory device is available. The basic syntax 7 .. parsed-literal:: 9 |qemu_system_x86| -device ivshmem-plain,memdev=hostmem 11 where hostmem names a host memory backend. For a POSIX shared memory 16 -object memory-backend-file,size=1M,share,mem-path=/dev/shm/ivshmem,id=hostmem 19 shared memory region. Interrupt support requires using a shared memory 21 shared memory server is qemu.git/contrib/ivshmem-server. An example 22 syntax when using the shared memory server is: [all …]
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| H A D | ivshmem-flat.rst | 1 Inter-VM Shared Memory Flat Device 2 ---------------------------------- 4 The ivshmem-flat device is meant to be used on machines that lack a PCI bus, 6 a PCI device. Machines like those with a Cortex-M MCU are good candidates to use 7 the ivshmem-flat device. Also, since the flat version maps the control and 8 status registers directly to the memory, it requires a quite tiny "device 12 Similar to the ivshmem device, the ivshmem-flat device supports both peer 13 notification via HW interrupts and Inter-VM shared memory. This allows the 16 running Linux), and an arm VM (using the ivshmem-flat device and running Zephyr 19 The ivshmem-flat device does not support the use of a ``memdev`` option (see [all …]
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| /openbmc/u-boot/include/ |
| H A D | tee.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 12 #define TEE_GEN_CAP_REG_MEM BIT(1) /* Supports registering shared memory */ 14 #define TEE_SHM_REGISTER BIT(0) /* In list of shared memory */ 15 #define TEE_SHM_SEC_REGISTER BIT(1) /* TEE notified of this memory */ 16 #define TEE_SHM_ALLOC BIT(2) /* The memory is malloced() and must */ 55 * struct tee_optee_ta_uuid - OP-TEE Trusted Application (TA) UUID format 57 * Used to identify an OP-TEE TA and define suitable to initialize structs 60 * OP-TEE. See RFC4122 for details on the format. 70 * struct tee_shm - memory shared with the TEE 73 * @addr: Pointer to the shared memory [all …]
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| /openbmc/u-boot/drivers/tee/optee/ |
| H A D | optee_smc.h | 1 /* SPDX-License-Identifier: BSD-2-Clause */ 3 * Copyright (c) 2015-2018, Linaro Limited 9 #include <linux/arm-smccc.h> 14 * https://github.com/OP-TEE/optee_os/blob/master/core/arch/arm/include/sm/optee_smc.h 35 * Normal cached memory (write-back), shareable for SMP systems and not 43 * 32-bit registers. 51 * 65cb6b93-af0c-4617-8ed6-644a8d1140f8 82 * Used by non-secure world to figure out which Trusted OS is installed. 85 * Returns UUID in a0-4 in the same way as OPTEE_SMC_CALLS_UID 95 * Used by non-secure world to figure out which version of the Trusted OS [all …]
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| H A D | optee_msg.h | 1 /* SPDX-License-Identifier: BSD-2-Clause */ 3 * Copyright (c) 2015-2018, Linaro Limited 13 * This file defines the OP-TEE message protocol used to communicate with 14 * an instance of OP-TEE running in secure world. This file is based on 15 * https://github.com/OP-TEE/optee_os/blob/master/core/include/optee_msg.h 22 * tee-supplicant. 26 * Part 1 - formatting of messages 51 * Pointer to a list of pages used to register user-defined SHM buffer. 54 * list of page addresses. OP-TEE core can reconstruct contiguous buffer from 66 * uint64_t pages_array[OPTEE_MSG_NONCONTIG_PAGE_SIZE/sizeof(uint64_t) - 1]; [all …]
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| /openbmc/u-boot/arch/arm/include/asm/arch-tegra/ |
| H A D | ivc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 12 * Tegra IVC is a communication protocol that transfers fixed-size frames 13 * bi-directionally and in-order between the local CPU and some remote entity. 14 * Communication is via a statically sized and allocated buffer in shared 15 * memory and a notification mechanism. 17 * This API handles all aspects of the shared memory buffer's metadata, and 19 * typically contain some higher-level protocol. The notification mechanism is 24 * frame, process that frame's memory buffer (fill or read it), and then 33 * struct tegra_ivc - In-memory shared memory layout. 40 * struct tegra_ivc - Software state of an IVC channel. [all …]
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| /openbmc/qemu/docs/specs/ |
| H A D | ivshmem-spec.rst | 2 Device Specification for Inter-VM shared memory device 5 The Inter-VM shared memory device (ivshmem) is designed to share a 6 memory region between multiple QEMU processes running different guests 8 shared memory area, it is modeled by QEMU as a PCI device exposing 9 said memory to the guest as a PCI BAR. 11 The device can use a shared memory object on the host directly, or it 27 -------- 31 - BAR0 holds device registers (256 Byte MMIO) 32 - BAR1 holds MSI-X table and PBA (only ivshmem-doorbell) 33 - BAR2 maps the shared memory object [all …]
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| H A D | vmw_pvscsi-spec.rst | 14 The interface is based on a memory area shared between hypervisor and VM. 15 The memory area is obtained by driver as a device IO memory resource of 17 The shared memory consists of a registers area and a rings area. 21 hypervisor to VM. Data itself is transferred via virtual scatter-gather DMA. 35 There are three rings in shared memory: 57 - ``PVSCSI_INTR_CMPL_0`` 58 - ``PVSCSI_INTR_CMPL_1`` 62 - ``PVSCSI_INTR_MSG_0`` 63 - ``PVSCSI_INTR_MSG_1`` 69 The interrupt modes supported are legacy, MSI and MSI-X. [all …]
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| /openbmc/qemu/include/hw/misc/ |
| H A D | ivshmem-flat.h | 2 * Inter-VM Shared Memory Flat Device 4 * SPDX-License-Identifier: GPL-2.0-or-later 16 #include "chardev/char-fe.h" 17 #include "system/memory.h" 27 * + QOM property "shmem-size" sets the size of the RAM region shared between 30 * + sysbus MMIO region 1: shared memory with ivshmem server 34 #define TYPE_IVSHMEM_FLAT "ivshmem-flat" 39 /* Ivshmem registers. See docs/specs/ivshmem-spec.rst for details. */ 80 /* Shared memory */
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| /openbmc/qemu/util/ |
| H A D | mmap-alloc.c | 2 * Support for RAM backed by mmaped host memory. 10 * later. See the COPYING file in the top-level directory. 21 #include "qemu/mmap-alloc.h" 22 #include "qemu/host-utils.h" 24 #include "qemu/error-report.h" 66 if (fd != -1) { in qemu_fd_getpagesize() 89 const bool shared = qemu_map_flags & QEMU_MAP_SHARED; in map_noreserve_effective() local 97 * shared mappings. For shared mappings, all mappers have to specify in map_noreserve_effective() 108 * Linux). For all shared or readonly mappings, MAP_NORESERVE is always in map_noreserve_effective() 109 * implicitly active -- no reservation; this includes shmem. The only in map_noreserve_effective() [all …]
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| /openbmc/qemu/docs/devel/migration/ |
| H A D | CPR.rst | 8 the cpr-reboot and cpr-transfer modes are available. 15 CPR unconditionally stops VM execution before memory is saved, and 18 cpr-reboot mode 19 --------------- 23 resumes by running QEMU with the ``-incoming`` option. Because the 27 Guest RAM can be saved in place if backed by shared memory, or can be 31 After state and memory are saved, the user may update userland host 33 the RAM is backed by persistent shared memory, such as a DAX device, 38 ``guest-suspend-ram`` command to the QEMU guest agent. The agent 39 must be pre-installed in the guest, and the guest must support [all …]
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| H A D | qpl-compression.rst | 4 The Intel Query Processing Library (Intel ``QPL``) is an open-source library to 8 The ``QPL`` compression relies on Intel In-Memory Analytics Accelerator(``IAA``) 9 and Shared Virtual Memory(``SVM``) technology, they are new features supported 21 +----------------+ +------------------+ 22 | MultiFD Thread | |accel-config tool | 23 +-------+--------+ +--------+---------+ 27 +-------+--------+ | Setup IAA 29 +-------+---+----+ | 31 | +-------------+-------+ 33 | Devices +-----+-----+ [all …]
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| /openbmc/openbmc/poky/meta/recipes-graphics/xorg-lib/ |
| H A D | libxshmfence_1.3.3.bb | 1 SUMMARY = "Shared memory 'SyncFence' synchronization primitive" 3 DESCRIPTION = "This library offers a CPU-based synchronization primitive compatible \ 4 with the X SyncFence objects that can be shared between processes \ 7 require xorg-lib-common.inc 14 EXTRA_OECONF += "--with-shared-memory-dir=/dev/shm"
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| /openbmc/qemu/include/hw/virtio/ |
| H A D | vhost-vdpa.h | 2 * vhost-vdpa.h 4 * Copyright(c) 2017-2018 Intel Corporation. 8 * See the COPYING file in the top-level directory. 17 #include "hw/virtio/vhost-iova-tree.h" 18 #include "hw/virtio/vhost-shadow-virtqueue.h" 20 #include "standard-headers/linux/vhost_types.h" 34 SVQ_TSTATE_DISABLING = -1, 39 /* Info shared by all vhost_vdpa device models */ 49 * It is shared among all ASID for simplicity, whether CVQ shares ASID with 51 * - Memory listener need access to guest's memory addresses allocated in [all …]
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| H A D | vhost-user.h | 2 * Copyright (c) 2017-2018 Intel Corporation 5 * See the COPYING file in the top-level directory. 11 #include "chardev/char-fe.h" 39 * VhostUserHostNotifier - notifier information for one queue 41 * @mr: memory region of notifier 43 * @unmap_addr: address to be un-mapped 46 * The VhostUserHostNotifier entries are re-used. When an old mapping 61 * VhostUserState - shared state for all vhost-user devices 74 * vhost_user_init() - initialise shared vhost_user state 75 * @user: allocated area for storing shared state [all …]
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| /openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Metric/ |
| H A D | Value.interface.yaml | 6 - name: Value 11 - readonly 12 - name: MaxValue 16 - readonly 19 - name: MinValue 21 default: -infinity 23 - readonly 26 - name: Unit 29 The unit for metric value. For example, memory in bytes, CPU in 32 - const [all …]
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/memstat/ |
| H A D | memstat_1.0.bb | 1 SUMMARY = "Display virtual memory allocation" 2 DESCRIPTION = "Lists all the processes, executables, and shared libraries \ 3 that are using up virtual memory. It's helpful to see how the shared memory \ 9 LICENSE = "GPL-2.0-only" 16 file://0001-Include-limits.h-for-PATH_MAX-definition.patch \ 22 install -d ${D}${bindir} 23 install -m 0755 memstat ${D}${bindir} 24 install -d ${D}${sysconfdir} 25 install -m 0755 memstat.conf ${D}${sysconfdir} 26 install -d ${D}${mandir}/man1 [all …]
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| /openbmc/qemu/include/standard-headers/linux/ |
| H A D | virtio_pmem.h | 1 /* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause */ 3 * Definitions for virtio-pmem devices. 13 #include "standard-headers/linux/types.h" 14 #include "standard-headers/linux/virtio_ids.h" 15 #include "standard-headers/linux/virtio_config.h" 18 /* guest physical address range will be indicated as shared memory region 0 */ 21 /* shmid of the shared memory region corresponding to the pmem */
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| /openbmc/bios-bmc-smm-error-logger/include/ |
| H A D | data_interface.hpp | 19 * Read bytes from shared buffer (blocking call). 21 * @param[in] offset - offset to read from relative to MMIO space 22 * @param[in] length - number of bytes to read 29 * Write bytes to shared buffer. 31 * @param[in] offset - offset to write to relative to MMIO space 32 * @param[in] bytes - byte vector of data. 39 * Getter for Memory Region Size 41 * @return return Memory Region size allocated
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| /openbmc/qemu/docs/devel/ |
| H A D | multi-thread-tcg.rst | 2 Copyright (c) 2015-2020 Linaro Ltd. 5 later. See the COPYING file in the top-level directory. 10 Multi-threaded TCG 13 This document outlines the design for multi-threaded TCG (a.k.a MTTCG) 14 system-mode emulation. user-mode emulation has always mirrored the 17 linux-user emulation. 19 The original system-mode TCG implementation was single threaded and 20 dealt with multiple CPUs with simple round-robin scheduling. This 22 being emulated gained additional cores and per-core performance gains 29 user-space thread. This is enabled by default for all FE/BE [all …]
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| /openbmc/qemu/include/hw/ssi/ |
| H A D | npcm7xx_fiu.h | 31 * struct NPCM7xxFIUFlash - Per-chipselect flash controller state. 32 * @direct_access: Memory region for direct flash access. 33 * @fiu: Pointer to flash controller shared state. 41 * NPCM7xxFIUState - Device state for one Flash Interface Unit. 43 * @mmio: Memory region for register access. 45 * @active_cs: Currently active chip select, or -1 if no chip is selected. 47 * @flash: Array of @cs_count per-flash-chip state objects. 51 * Each FIU has a shared bank of registers, and controls up to four chip 52 * selects. Each chip select has a dedicated memory region which may be used to 53 * read and write the flash connected to that chip select as if it were memory. [all …]
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| /openbmc/openbmc/meta-openembedded/meta-networking/recipes-daemons/opensaf/opensaf/ |
| H A D | 0001-Use-correct-printf-format-for-__fsblkcnt_t.patch | 3 Date: Sun, 15 Nov 2020 13:22:31 -0800 10 …'long int', but argument 3 has type '__fsblkcnt_t' {aka 'long long unsigned int'} [-Werror=format=] 12 Upstream-Status: Pending 13 Signed-off-by: Khem Raj <raj.khem@gmail.com> 14 --- 18 --- a/src/base/os_defs.c 20 @@ -917,7 +917,11 @@ uint32_t ncs_os_posix_shm(NCS_OS_POSIX_S 21 ((statsvfs.f_bfree - 1) * statsvfs.f_frsize)) { 25 + "Insufficient shared memory (%lld) to write the data of size: %" PRId64 27 "Insufficient shared memory (%ld) to write the data of size: %" PRId64 [all …]
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| /openbmc/qemu/contrib/ivshmem-server/ |
| H A D | ivshmem-server.h | 6 * top-level directory. 14 * mode. The ivshmem clients (qemu or ivshmem-client) connect to this 22 * qemu is able to transform an event on a eventfd into a PCI MSI-x 26 * associated to the ivshmem shared memory. 80 * @shm_path: Path to the shared memory. The path corresponds to a POSIX 82 * @shm_size: Size of shared memory 107 * shared memory file descriptor. The structure remains initialized, so
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| /openbmc/u-boot/board/freescale/bsc9131rdb/ |
| H A D | README | 2 -------- 3 - BSC9131 is integrated device that targets Femto base station market. 5 technologies with MAPLE-B2F baseband acceleration processing elements. 6 - It's MAPLE disabled personality is called 9231. 9 . Power Architecture subsystem including a e500 processor with 256-Kbyte shared 11 . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache 13 Processing (MAPLE-B2F) 14 . A multi-standard baseband algorithm accelerator for Channel Decoding/Encoding, 20 . DDR3/3L memory interface with 32-bit data width without ECC and 16-bit with 21 ECC, up to 400-MHz clock/800 MHz data rate [all …]
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| /openbmc/smbios-mdr/ |
| H A D | README.md | 1 # smbios-mdr 6 binary [SMBIOS][1] table and publishing the system information on D-Bus, to be 17 the VGA shared memory region. MDRv2 has a concept of multiple agents, each 22 `intel-ipmi-oem` implements the [IPMI command handlers][2], routing commands and 23 data to the correct agent (e.g. `smbios-mdr`). The [D-Bus interface][3] between 24 the IPMI handler and `smbios-mdr` is largely a mirror of IPMI commands. 26 ### phosphor-ipmi-blobs 28 [`phosphor-ipmi-blobs`][4] is an alternative implementation of a generic IPMI 30 transfers the data in-band with the IPMI commands and therefore slower than 31 using a shared memory region (which may or may not be a concern). [all …]
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