Searched full:shallower (Results 1 – 14 of 14) sorted by relevance
24 * the upcoming CPU idle period and, if not, then which of the shallower idle59 * shallower than the one whose bin is fallen into by the sleep length (these79 * - The sum of the "intercepts" metrics for all of the idle states shallower85 * shallower than the candidate one.91 * - Traverse the idle states shallower than the candidate one in the118 * be woken up to do more work soon and so a shallower idle state should be131 * TEO metrics mechanism. If it's above, the closest shallower idle state will342 * teo_find_shallower_state - Find shallower idle state matching given duration.447 * shallower than the current one. in teo_select()490 * shallower than the current candidate one (idx) is greater than the in teo_select()[all …]
138 the shallower idle states instead. [The "depth" of an idle state roughly314 shallower state is likely to be a better option then. The first approximation336 that time, the governor may need to select a shallower state with a suitable495 this idle state and entered a shallower one instead of it (or even it did not
176 shallower slope and essentially represents the energy consumption of the idle221 However, the lower power consumption (i.e. shallower energy curve slope) of226 shallower states in a system with multiple idle states) is defined
212 * a shallower prefetch queue than later chips.
72 * state shallower than previously set by acpi_device_set_power() for @device110 * shallower than the actual power state of the device, because in acpi_device_get_power()219 * (deeper) states to higher-power (shallower) states. in acpi_device_set_power()
185 be saved by staying in a shallower idle state for the same amount of
311 /* Shallower states are enabled, so update. */ in cpuidle_enter_state()
596 * Interrupts only occur in D3hot or shallower and only if enabled in pciehp_isr()
702 * When switching from a shallower to a deeper call stack
248 * When switching from a shallower to a deeper call stack
990 * if the power state returned by _S0W is D2 or shallower, in acpi_pci_bridge_d3()
1207 * in a shallower state than SPR loss, so force it to in pnv_arch300_idle_init()
1724 /* if PC10 disabled via cmdline intel_idle.max_cstate=7 or shallower */ in sklh_idle_state_table_update()
737 * that state to a shallower power state (lower in number). The HW will decide