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/openbmc/qemu/target/ppc/translate/
H A Dmisc-impl.c.inc27 uint32_t l = a->l;
28 uint32_t sc = a->sc;
36 if (!(ctx->insns_flags & PPC_MEM_SYNC)) {
37 if (ctx->insns_flags & PPC_BOOKE) {
50 if (!(ctx->insns_flags2 & PPC2_ISA310)) {
59 if (((l == 1) && (ctx->insns_flags2 & PPC2_MEM_LWSYNC)) || (l == 5)) {
72 if (((l == 2) || !(ctx->insns_flags & PPC_64B)) && !ctx->pr) {
91 if (!(ctx->insns_flags & PPC_MEM_EIEIO)) {
92 if ((ctx->insns_flags & PPC_BOOKE) ||
93 (ctx->insns_flags2 & PPC2_BOOKE206)) {
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/openbmc/linux/tools/arch/powerpc/include/asm/
H A Dbarrier.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 * providing an ordering (separately) for (a) cacheable stores and (b)
16 * loads and stores to non-cacheable memory (e.g. I/O devices).
30 #if defined(__powerpc64__)
45 #endif /* defined(__powerpc64__) */
/openbmc/u-boot/doc/
H A DREADME.JFFS22 -----------------------
4 JFFS2 in U-Boot is a read only implementation of the file system in
8 fsload - load binary file from a file system image
9 fsinfo - print information about file systems
10 ls - list files in a directory
11 chpart - change active partition
13 If you do now need the commands, you can enable the filesystem separately
30 defined the first flash bank to use
34 ---
H A DREADME.TPL5 --------
7 TPL---Third Program Loader.
20 ------------
25 The object files are built separately for SPL/TPL and placed in the
27 u-boot-{spl|tpl}, u-boot-{spl|tpl}.bin and u-boot-{spl|tpl}.map.
30 make environment and also appended to CPPFLAGS with -DCONFIG_TPL_BUILD.
40 LIBS-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += common/libcommon.o
42 CONFIG_SPL_LIBCOMMON_SUPPORT is defined in board config file:
H A DREADME.SPL5 --------
14 ------------
16 The object files for SPL are built separately and placed in the "spl" directory.
17 The final binaries which are generated are u-boot-spl, u-boot-spl.bin and
18 u-boot-spl.map.
26 obj-y += board_spl.o
28 obj-y += board.o
31 obj-$(CONFIG_SPL_BUILD) += foo.o
42 defined with CONFIG_SPL_LDSCRIPT.
44 To support generic U-Boot libraries and drivers in the SPL binary one can
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H A DREADME.xtensa1 U-Boot for the Xtensa Architecture
5 -------------------------------------
8 Diamond Cores are pre-configured instances available for license and
12 and custom instructions, registers and co-processors. The custom core
18 Xtensa CPUs in U-Boot. Therefore, there is only a single 'xtensa' CPU
19 in the cpu tree of U-Boot.
21 In the same manner as the Linux port to Xtensa, U-Boot adapts to an
24 abstraction layer (HAL). For the purpose of U-Boot, the HAL consists only
30 --------------------------------------------------------
33 a variant-specific directory located in the arch/xtensa/include/asm
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H A DREADME.NetConsole2 In U-Boot, we implemented the networked console via the standard
9 CONFIG_NETCONSOLE_BUFFER_SIZE - Override the default buffer size
16 The source / listening port can be configured separately by setting
34 script can be interrupted by pressing ^T (CTRL-T).
37 usage of nc has been changed and -l and -p options are considered
39 you can just remove the -p option from the script.
45 has CONFIG_NETCONSOLE defined. If the netconsole script can find it
48 For Linux, the network-based console needs special configuration.
59 netconsole=[src-port]@[src-ip]/[<dev>],[tgt-port]@<tgt-ip>/[tgt-macaddr]
63 src-port source for UDP packets
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/openbmc/linux/arch/powerpc/include/asm/
H A Dbarrier.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #include <asm/asm-const.h>
11 #include <asm/ppc-opcode.h>
19 * providing an ordering (separately) for (a) cacheable stores and (b)
20 * loads and stores to non-cacheable memory (e.g. I/O devices).
36 * heavy-weight sync, so smp_wmb() can be a lighter-weight eieio.
42 /* The sub-arch has lwsync */
43 #if defined(CONFIG_PPC64) || defined(CONFIG_PPC_E500MC)
45 #elif defined(CONFIG_BOOKE)
89 #elif defined(CONFIG_PPC_E500)
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/openbmc/linux/include/sound/
H A Djack.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 * enum snd_jack_types - Jack types which can be reported
42 SND_JACK_MECHANICAL = 0x0008, /* If detected separately */
106 #if !defined(CONFIG_SND_JACK) || !defined(CONFIG_SND_JACK_INPUT_DEV)
/openbmc/linux/arch/x86/include/asm/
H A Dsuspend_64.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2001-2003 Pavel Machek <pavel@suse.cz>
18 * and make sure that __save/__restore_processor_state(), defined in
36 * so we save them separately. We save the kernelmode GSBASE to
58 set_debugreg((thread)->debugreg##register, register)
/openbmc/linux/arch/x86/include/asm/xen/
H A Dhypervisor.h4 * Linux-specific hypervisor handling.
6 * Copyright (c) 2002-2004, K A Fraser
11 * separately from the Linux kernel or incorporated into other
108 #if defined(CONFIG_XEN_DOM0) && defined(CONFIG_ACPI)
/openbmc/linux/include/linux/
H A Dmm_types_task.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * (These are defined separately to decouple sched.h from mm_types.h as much as possible.)
H A Dvga_switcheroo.h2 * vga_switcheroo.h - Support for laptop with dual GPU using one set of outputs
39 * enum vga_switcheroo_handler_flags_t - handler flags bitmask
41 * DDC lines separately. This signals to clients that they should call
44 * the AUX channel separately. This signals to clients that the active
47 * skip the AUX handshake and set up its output with these pre-calibrated
59 * enum vga_switcheroo_state - client power state
76 * enum vga_switcheroo_client_id - client identifier
94 * struct vga_switcheroo_handler - handler callbacks
102 * Mandatory. For muxless machines this should be a no-op. Returning 0
126 * struct vga_switcheroo_client_ops - client callbacks
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/openbmc/webui-vue/docs/customization/
H A Dbuild.md6 - [Setup](#setup)
7 - [Store](#store)
8 - [Router](#router)
9 - [App Navigation](#app-navigation)
10 - [Theming](#theming)
11 - [Local development](#local-development)
12 - [Production build](#production-build)
35 to match the `VUE_APP_ENV_NAME` value defined in the .env file. The store
62 needs to match the `VUE_APP_ENV_NAME` value defined in the .env file. The
65 imports (over lazy-loading routes) to avoid creating separate JS chunks.
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/openbmc/docs/designs/mctp/
H A Dmctp.md8 BMC. This is primarily IPMI-based, but also includes a few hardware-specific
9 side-channels, like hiomap. On OpenPOWER hardware at least, we've definitely
22 allows us to design these parts separately. Currently, IPMI defines both of
23 these; we currently have BT and KCS (both defined as part of the IPMI 2.0
27 attempted, but not in a cross-implementation manner so far. This does not
31 layer bindings for the actual transport of MCTP packets. These are defined by
40 ![](mctp-standards.svg)
46 only need to be aware that they are communicating with a certain entity, defined
48 that communicates over MCTP - for example, the host device, the BMC, or any
49 other system peripheral - static or hot-pluggable.
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/openbmc/linux/Documentation/core-api/
H A Dnetlink.rst1 .. SPDX-License-Identifier: BSD-3-Clause
13 ---------------
21 -------------
31 ---------------
44 ----------
51 ------------------------
54 them - make sure to report dump inconsistency with ``NLM_F_DUMP_INTR``.
65 -------
67 kernel-policy
71 operations of the family, defined for each operation individually - ``per-op``,
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/openbmc/linux/Documentation/admin-guide/perf/
H A Darm-ccn.rst5 CCN-504 is a ring-bus interconnect consisting of 11 crosspoints
11 -----------------
29 Crosspoint watchpoint-based events (special "event" value 0xfe)
34 Masks are defined separately from the event description
45 request the events on this processor (if not, the perf_event->cpu value
57 / # perf stat -a -e ccn/cycles/,ccn/xp_valid_flit,xp=1,port=0,vc=1,dir=1/ \
61 not work. Per-task (without "-a") perf sessions are not supported.
/openbmc/qemu/target/riscv/
H A Dcpu.h2 * QEMU RISC-V CPU
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
5 * Copyright (c) 2017-2018 SiFive, Inc.
25 #include "hw/qdev-properties.h"
26 #include "exec/cpu-defs.h"
28 #include "qemu/cpu-float.h"
33 #include "qapi/qapi-types-common.h"
34 #include "cpu-qom.h"
40 #if defined(TARGET_RISCV32)
42 #elif defined(TARGET_RISCV64)
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/openbmc/linux/Documentation/process/
H A Dcode-of-conduct.rst11 our community a harassment-free experience for everyone, regardless of age, body
13 expression, level of experience, education, socio-economic status, nationality,
59 representing a project or community include using an official project e-mail
62 further defined and clarified by project maintainers.
74 separately.
80 available at https://www.contributor-covenant.org/version/1/4/code-of-conduct.html
/openbmc/u-boot/arch/arm/cpu/armv8/
H A DKconfig15 bool "Enable multiple CPUs to enter into U-Boot"
21 CPUECTLR_EL1.SMPEN bit before U-Boot.
36 bool "Support spin-table enable method"
39 Say Y here to support "spin-table" enable method for booting Linux.
42 - Specify enable-method = "spin-table" in each CPU node in the
44 - Bring secondary CPUs into U-Boot proper in a board specific
49 U-Boot automatically does:
50 - Set "cpu-release-addr" property of each CPU node
52 - Reserve the code for the spin-table and the release address
65 - Address of secure firmware.
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/openbmc/linux/Documentation/driver-api/usb/
H A Dcallbacks.rst7 Usbcore will call into a driver through callbacks defined in the driver
11 completion callback can be found in :ref:`usb-urb`.
13 The callbacks defined in the driver structure are:
17 - @probe:
21 - @disconnect:
28 - @ioctl:
36 - @suspend:
39 - @resume:
42 - @reset_resume:
48 - @pre_reset:
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/openbmc/linux/Documentation/networking/
H A Dstatistics.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - standard interface statistics based on
16 - protocol-specific statistics; and
17 - driver-defined statistics available via ethtool.
20 -----------------------------
25 $ ip -s -s link show dev ens4u1u1
38 Note that `-s` has been specified twice to see all members of
40 If `-s` is specified once the detailed errors won't be shown.
42 `ip` supports JSON formatting via the `-j` option.
44 Protocol-specific statistics
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/openbmc/u-boot/arch/arm/cpu/arm926ejs/spear/
H A Dspl.c1 // SPDX-License-Identifier: GPL-2.0+
24 clkenb = readl(&misc_p->periph1_clken); in ddr_clock_init()
29 writel(clkenb, &misc_p->periph1_clken); in ddr_clock_init()
30 writel(clkenb, &misc_p->periph1_clken); in ddr_clock_init()
32 ddrpll = readl(&misc_p->pll_ctr_reg); in ddr_clock_init()
43 writel(ddrpll, &misc_p->pll_ctr_reg); in ddr_clock_init()
45 writel(readl(&misc_p->periph1_clken) | PERIPH_MPMC_EN, in ddr_clock_init()
46 &misc_p->periph1_clken); in ddr_clock_init()
77 * Compensation values are also handled separately in mpmc_init()
90 writel(FREQ_332, &misc_p->pll1_frq); in pll_init()
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/openbmc/linux/Documentation/driver-api/surface_aggregator/clients/
H A Dcdev.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 User-Space EC Interface (cdev)
11 The ``surface_aggregator_cdev`` module provides a misc-device for the SSAM
12 controller to allow for a (more or less) direct connection from user-space to
18 device-file. All functionality of this interface is provided via IOCTLs.
19 These IOCTLs and their respective input/output parameter structs are defined in
23 at https://github.com/linux-surface/surface-aggregator-module/tree/master/scripts/ssam.
31 Events can be received by reading from the device-file. The are represented by
37 interface, associated with a specific target category and device-file-instance.
43 notifiers work per-client (i.e. per-device-file-instance), events are enabled
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/openbmc/libmctp/
H A DREADME.md4 Component Transport Protocol (MCTP), as defined by DMTF standard "DSP0236", plus
12 - where you are implementing MCTP in an embedded device; or
13 - where you have Linux system:
14 - with no kernel MCTP support,
15 - need a single application implementing all of the MCTP stack; and
16 - you are providing your own hardware drivers for MCTP transports.
19 certainly_ want to use the in-kernel MCTP support, which gives you a standard
20 sockets-based interface to transmit and receive MCTP messages. When using the
25 There is an overview and example code for the in-kernel support in the [MCTP
26 kernel docs][kernel-mctp], and a general guide in an [introduction to MCTP on
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