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/openbmc/linux/arch/ia64/kernel/
H A Dsignal.c43 restore_sigcontext (struct sigcontext __user *sc, struct sigscratch *scr) in restore_sigcontext() argument
58 err |= __get_user(scr->pt.ar_unat, &sc->sc_ar_unat); in restore_sigcontext()
59 err |= __get_user(scr->pt.ar_fpsr, &sc->sc_ar_fpsr); in restore_sigcontext()
60 err |= __get_user(scr->pt.ar_pfs, &sc->sc_ar_pfs); in restore_sigcontext()
61 err |= __get_user(scr->pt.pr, &sc->sc_pr); /* predicates */ in restore_sigcontext()
62 err |= __get_user(scr->pt.b0, &sc->sc_br[0]); /* b0 (rp) */ in restore_sigcontext()
63 err |= __get_user(scr->pt.b6, &sc->sc_br[6]); /* b6 */ in restore_sigcontext()
64 err |= __copy_from_user(&scr->pt.r1, &sc->sc_gr[1], 8); /* r1 */ in restore_sigcontext()
65 err |= __copy_from_user(&scr->pt.r8, &sc->sc_gr[8], 4*8); /* r8-r11 */ in restore_sigcontext()
66 err |= __copy_from_user(&scr->pt.r12, &sc->sc_gr[12], 2*8); /* r12-r13 */ in restore_sigcontext()
[all …]
/openbmc/qemu/hw/char/
H A Drenesas_sci.c43 REG8(SCR, 2)
44 FIELD(SCR, CKE, 0, 2)
45 FIELD(SCR, TEIE, 2, 1)
46 FIELD(SCR, MPIE, 3, 1)
47 FIELD(SCR, RE, 4, 1)
48 FIELD(SCR, TE, 5, 1)
49 FIELD(SCR, RIE, 6, 1)
50 FIELD(SCR, TIE, 7, 1)
78 return FIELD_EX8(sci->scr, SCR, RE); in can_receive()
88 if (FIELD_EX8(sci->scr, SCR, RIE)) { in receive()
[all …]
H A Dsh_serial.c55 uint8_t scr; member
108 case 0x08: /* SCR */ in sh_serial_write()
110 s->scr = val & ((s->feat & SH_SERIAL_FEAT_SCIF) ? 0xfa : 0xff); in sh_serial_write()
228 ret = s->scr; in sh_serial_read()
240 case 0x08: /* SCR */ in sh_serial_read()
241 ret = s->scr; in sh_serial_read()
261 if (s->scr & (1 << 5)) { in sh_serial_read()
323 return s->scr & (1 << 4); in sh_serial_can_receive()
344 if (s->scr & (1 << 6) && s->rxi) { in sh_serial_timeout_int()
364 if (s->scr & (1 << 6) && s->rxi) { in sh_serial_receive1()
[all …]
/openbmc/linux/drivers/media/tuners/
H A Dtda827x.c337 u8 scr; member
343 { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
344 { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
345 { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
346 { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
347 { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
348 { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
349 { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
350 { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
351 { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
[all …]
/openbmc/linux/Documentation/arch/s390/
H A Dconfig3270.sh22 SCR=$ROOT/tmp/mkdev3270
23 SCRTMP=$SCR.a
37 echo "#!/bin/sh" > $SCR || exit 1
38 echo " " >> $SCR
39 echo "# Script built by /sbin/config3270" >> $SCR
41 echo rm -rf "$D/$SUBD/*" >> $SCR
46 echo mkdir -p $D/$SUBD >> $SCR
56 echo mknod $D/$TUB c $fsmaj 0 >> $SCR
57 echo chmod 666 $D/$TUB >> $SCR
61 echo mknod $D/$TUB$devno c $fsmaj $min >> $SCR
[all …]
/openbmc/linux/sound/soc/mxs/
H A Dmxs-saif.c81 u32 scr; in mxs_saif_set_clk() local
102 scr = __raw_readl(master_saif->base + SAIF_CTRL); in mxs_saif_set_clk()
103 scr &= ~BM_SAIF_CTRL_BITCLK_MULT_RATE; in mxs_saif_set_clk()
104 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
127 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
134 scr |= BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
144 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
155 __raw_writel(scr, master_saif->base + SAIF_CTRL); in mxs_saif_set_clk()
167 scr |= BF_SAIF_CTRL_BITCLK_MULT_RATE(4); in mxs_saif_set_clk()
170 scr |= BF_SAIF_CTRL_BITCLK_MULT_RATE(3); in mxs_saif_set_clk()
[all …]
/openbmc/linux/net/netfilter/
H A Dnf_conntrack_proto_dccp.c92 #define sCR CT_DCCP_CLOSEREQ macro
141 * sCR -> sIG Ignore, conntrack might be out of sync
145 * sNO, sRQ, sRS, sPO. sOP, sCR, sCG, sTW, */
155 * sCR -> sIG Ignore, might be response to ignored Request
160 * sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
170 * sCR -> sCR Ack in CLOSEREQ MAY be processed (8.3.)
174 * sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
175 sIV, sIV, sPO, sPO, sOP, sCR, sCG, sIV
184 * sCR -> sCR Data in CLOSEREQ MAY be processed (8.3.)
188 * sNO, sRQ, sRS, sPO, sOP, sCR, sCG, sTW */
[all …]
/openbmc/linux/arch/loongarch/kernel/
H A Dlbt.S26 movscr2gr t1, $scr0 # save scr
45 ldptr.d t1, a0, THREAD_SCR0 # restore scr
61 * Load scr/eflag with zero.
74 * a0: scr
78 movscr2gr t1, $scr0 # save scr
94 * a0: scr
98 EX ld.d t1, a0, (0 * SCR_REG_WIDTH) # restore scr
/openbmc/linux/net/netfilter/ipvs/
H A Dip_vs_proto_sctp.c276 #define sCR IP_VS_SCTP_S_COOKIE_REPLIED macro
290 /* sNO, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL*/
291 /* d */{sES, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL},
292 /* i */{sI1, sIN, sIN, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sIN, sIN},
293 /* i_a */{sCW, sCW, sCW, sCS, sCR, sCO, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL},
294 /* c_e */{sCR, sIN, sIN, sCR, sCR, sCW, sCO, sCE, sES, sSS, sSR, sSA, sRJ, sCL},
295 /* c_a */{sES, sI1, sIN, sCS, sCR, sCW, sCO, sES, sES, sSS, sSR, sSA, sRJ, sCL},
296 /* s */{sSR, sI1, sIN, sCS, sCR, sCW, sCO, sCE, sSR, sSS, sSR, sSA, sRJ, sCL},
297 /* s_a */{sCL, sIN, sIN, sCS, sCR, sCW, sCO, sCE, sES, sCL, sSR, sCL, sRJ, sCL},
298 /* s_c */{sCL, sCL, sCL, sCS, sCR, sCW, sCO, sCE, sES, sSS, sSR, sCL, sRJ, sCL},
[all …]
/openbmc/u-boot/doc/
H A DREADME.distro185 specific boot.scr scripts are enabled. This enables distros to generate a
186 U-Boot-specific boot.scr script rather than extlinux.conf as the boot
188 CONFIG_DISTRO_DEFAULTS exposes enough parameterization to boot.scr to
189 allow for board-agnostic boot.scr content, this document recommends that
190 distros generate extlinux.conf rather than boot.scr. extlinux.conf is intended
191 to work across multiple bootloaders, whereas boot.scr will only work with
192 U-Boot. TODO: document the contract between U-Boot and boot.scr re: which
193 environment variables a generic boot.scr may rely upon.
258 Mandatory, if the boot script is boot.scr rather than extlinux.conf. The
259 location in RAM where boot.scr will be loaded to prior to execution.
[all …]
/openbmc/u-boot/drivers/spi/
H A Dpl022_spi.c206 static inline u32 spi_rate(u32 rate, u16 cpsdvsr, u16 scr) in spi_rate() argument
208 return rate / (cpsdvsr * (1 + scr)); in spi_rate()
214 u16 scr = SSP_SCR_MIN, cr0 = 0, cpsr = SSP_CPSR_MIN, best_scr = scr, in pl022_spi_set_speed() local
230 while (scr <= SSP_SCR_MAX) { in pl022_spi_set_speed()
231 tmp = spi_rate(rate, cpsr, scr); in pl022_spi_set_speed()
236 best_scr = scr; in pl022_spi_set_speed()
244 scr++; in pl022_spi_set_speed()
247 scr = SSP_SCR_MIN; in pl022_spi_set_speed()
/openbmc/u-boot/arch/arm/cpu/armv7/sunxi/
H A Dpsci.c196 u32 scr; in cp15_read_scr() local
198 asm volatile ("mrc p15, 0, %0, c1, c1, 0" : "=r" (scr)); in cp15_read_scr()
200 return scr; in cp15_read_scr()
203 static void __secure cp15_write_scr(u32 scr) in cp15_write_scr() argument
205 asm volatile ("mcr p15, 0, %0, c1, c1, 0" : : "r" (scr)); in cp15_write_scr()
217 u32 scr, reg, cpu; in psci_fiq_enter() local
220 scr = cp15_read_scr(); in psci_fiq_enter()
221 cp15_write_scr(scr & ~BIT(0)); in psci_fiq_enter()
242 cp15_write_scr(scr); in psci_fiq_enter()
/openbmc/linux/arch/powerpc/platforms/85xx/
H A Dmpc85xx_mds.c58 int scr; in mpc8568_fixup_125_clock() local
62 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
64 if (scr < 0) in mpc8568_fixup_125_clock()
65 return scr; in mpc8568_fixup_125_clock()
67 err = phy_write(phydev, MV88E1111_SCR, scr & ~(MV88E1111_SCR_125CLK)); in mpc8568_fixup_125_clock()
77 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
79 if (scr < 0) in mpc8568_fixup_125_clock()
80 return scr; in mpc8568_fixup_125_clock()
82 err = phy_write(phydev, MV88E1111_SCR, scr | 0x0008); in mpc8568_fixup_125_clock()
/openbmc/linux/drivers/net/wan/
H A Dhdlc_ppp.c86 enum {INV = 0x10, IRC = 0x20, ZRC = 0x40, SCR = 0x80, SCA = 0x100, enumerator
263 RCR+ = Receive-Configure-Request (Good) scr = Send-Configure-Request
280 {IRC|SCR|3, INV , INV , INV , INV , INV , INV }, /* START */
282 { INV , INV ,STR|2, SCR|3 ,SCR|3, SCR|5 , INV }, /* TO+ */
284 { STA|0 ,IRC|SCR|SCA|5, 2 , SCA|5 ,SCA|6, SCA|5 ,SCR|SCA|5}, /* RCR+ */
285 { STA|0 ,IRC|SCR|SCN|3, 2 , SCN|3 ,SCN|4, SCN|3 ,SCR|SCN|3}, /* RCR- */
286 { STA|0 , STA|1 , 2 , IRC|4 ,SCR|3, 6 , SCR|3 }, /* RCA */
287 { STA|0 , STA|1 , 2 ,IRC|SCR|3,SCR|3,IRC|SCR|5, SCR|3 }, /* RCN */
289 { 0 , 1 , 1 , 3 , 3 , 5 , SCR|3 }, /* RTA */
318 if (action & (SCR | STR)) /* set Configure-Req/Terminate-Req timer */ in ppp_cp_event()
[all …]
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dmp.c35 src->scr |= cpu_reset_mask[nr]; in cpu_reset()
41 printf("core %d => %d\n", nr, !!(src->scr & cpu_ctrl_mask[nr])); in cpu_status()
66 src->scr |= cpu_ctrl_mask[nr]; in cpu_release()
84 src->scr &= ~cpu_ctrl_mask[nr]; in cpu_disable()
/openbmc/linux/drivers/mmc/core/
H A Dsd_ops.c263 __be32 *scr; in mmc_app_send_scr() local
265 /* NOTE: caller guarantees scr is heap-allocated */ in mmc_app_send_scr()
274 scr = kmalloc(sizeof(card->raw_scr), GFP_KERNEL); in mmc_app_send_scr()
275 if (!scr) in mmc_app_send_scr()
291 sg_init_one(&sg, scr, 8); in mmc_app_send_scr()
297 card->raw_scr[0] = be32_to_cpu(scr[0]); in mmc_app_send_scr()
298 card->raw_scr[1] = be32_to_cpu(scr[1]); in mmc_app_send_scr()
300 kfree(scr); in mmc_app_send_scr()
H A Dsd.c209 * Given a 64-bit response, decode to our card SCR structure.
213 struct sd_scr *scr = &card->scr; in mmc_decode_scr() local
222 pr_err("%s: unrecognised SCR structure version %d\n", in mmc_decode_scr()
227 scr->sda_vsn = UNSTUFF_BITS(resp, 56, 4); in mmc_decode_scr()
228 scr->bus_widths = UNSTUFF_BITS(resp, 48, 4); in mmc_decode_scr()
229 if (scr->sda_vsn == SCR_SPEC_VER_2) in mmc_decode_scr()
231 scr->sda_spec3 = UNSTUFF_BITS(resp, 47, 1); in mmc_decode_scr()
233 if (scr->sda_spec3) { in mmc_decode_scr()
234 scr->sda_spec4 = UNSTUFF_BITS(resp, 42, 1); in mmc_decode_scr()
235 scr->sda_specx = UNSTUFF_BITS(resp, 38, 4); in mmc_decode_scr()
[all …]
/openbmc/linux/drivers/tty/serial/8250/
H A D8250_pericom.c54 int scr; in pericom_do_set_divisor() local
56 for (scr = 16; scr > 4; scr--) { in pericom_do_set_divisor()
57 unsigned int maxrate = port->uartclk / scr; in pericom_do_set_divisor()
78 serial_port_out(port, 2, 16 - scr); in pericom_do_set_divisor()
/openbmc/linux/sound/soc/fsl/
H A Dfsl_ssi.c123 u32 scr; member
213 * @i2s_net: I2S and Network mode configurations of SCR register
394 * fsl_ssi_config_enable - Set SCR, SIER, STCR and SRCR registers with
417 * to prevent online reconfigurations, then jump to set SCR directly in fsl_ssi_config_enable()
468 /* Enable all remaining bits in SCR */ in fsl_ssi_config_enable()
470 vals[dir].scr, vals[dir].scr); in fsl_ssi_config_enable()
497 * fsl_ssi_config_disable - Unset SCR, SIER, STCR and SRCR registers
510 u32 sier, srcr, stcr, scr; in fsl_ssi_config_disable() local
527 scr = ssi_excl_shared_bits(vals->scr, avals->scr, aactive); in fsl_ssi_config_disable()
529 /* Disable safe bits of SCR register for the current stream */ in fsl_ssi_config_disable()
[all …]
/openbmc/linux/arch/sh/boards/mach-hp6xx/
H A Dpm.c101 u8 scr; in hp6x0_pm_enter() local
108 scr = inb(HD64461_PCC1SCR); in hp6x0_pm_enter()
109 scr |= HD64461_PCCSCR_VCC1; in hp6x0_pm_enter()
110 outb(scr, HD64461_PCC1SCR); in hp6x0_pm_enter()
/openbmc/u-boot/doc/SPL/
H A DREADME.am335x-network24 "if tftp 80000000 debrick.scr; then " \
86 $ ./tools/mkimage -A arm -O U-Boot -C none -T script -d <your script> debrick.scr
88 This will create debrick.scr file with your script inside.
90 3. Copy debrick.scr to TFTP root directory. You also need to copy
/openbmc/u-boot/board/samsung/common/bootscripts/
H A Dautoboot.cmd1 # This is an example file to generate boot.scr - a boot script for U-Boot
2 # Generate boot.scr:
3 # ./tools/mkimage -c none -A arm -T script -d autoboot.cmd boot.scr
/openbmc/linux/drivers/spi/
H A Dspi-ep93xx.c110 * @div_scr: pointer to return the scr divider
117 int cpsr, scr; in ep93xx_spi_calc_divisors() local
128 * rate = spi_clock_rate / (cpsr * (1 + scr)) in ep93xx_spi_calc_divisors()
130 * cpsr must be even number and starts from 2, scr can be any number in ep93xx_spi_calc_divisors()
134 for (scr = 0; scr <= 255; scr++) { in ep93xx_spi_calc_divisors()
135 if ((spi_clk_rate / (cpsr * (scr + 1))) <= rate) { in ep93xx_spi_calc_divisors()
136 *div_scr = (u8)scr; in ep93xx_spi_calc_divisors()
169 dev_dbg(&host->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n", in ep93xx_spi_chip_setup()
/openbmc/openbmc/meta-raspberrypi/recipes-bsp/rpi-u-boot-scr/
H A Drpi-u-boot-scr.bb19 mkimage -A ${UBOOT_ARCH} -T script -C none -n "Boot script" -d "${WORKDIR}/boot.cmd" boot.scr
29 install -m 0644 boot.scr ${DEPLOYDIR}
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/lxdm/lxdm/
H A D0002-greeter-gdk.c-fix-typo.patch24 scr=gdk_screen_get_default();
25 g_signal_connect(scr, "size-changed", G_CALLBACK(on_screen_size_changed), win);

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