/openbmc/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | rockchip-saradc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 15 - const: rockchip,saradc 16 - const: rockchip,rk3066-tsadc 17 - const: rockchip,rk3399-saradc 18 - const: rockchip,rk3588-saradc 19 - items: [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 33 compatible = "fixed-clock"; 34 clock-frequency = <24000000>; 35 #clock-cells = <0>; [all …]
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H A D | rv1126.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rv1126-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rockchip,rv1126-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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H A D | rk3128.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3128-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <1>; 16 #size-cells = <1>; 18 arm-pmu { [all …]
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H A D | rk3066a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3066a-cru.h> 10 #include <dt-bindings/power/rk3066-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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H A D | rv1108.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/rv1108-cru.h> 7 #include <dt-bindings/pinctrl/rockchip.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 15 interrupt-parent = <&gic>; [all …]
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H A D | rk3288.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power/rk3288-power.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #address-cells = <2>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | meson-gxm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gxl.dtsi" 10 compatible = "amlogic,meson-gxm"; 13 cpu-map { 47 compatible = "arm,cortex-a53", "arm,armv8"; 49 enable-method = "psci"; 50 next-level-cache = <&l2>; 56 compatible = "arm,cortex-a53", "arm,armv8"; 58 enable-method = "psci"; 59 next-level-cache = <&l2>; [all …]
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H A D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR X11 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&gic>; 33 compatible = "simple-bus"; 34 #address-cells = <1>; 35 #size-cells = <1>; 38 dmac1_s: dma-controller@20018000 { 43 #dma-cells = <1>; 44 arm,pl330-broken-no-flushp; [all …]
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H A D | rv1108.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/rv1108-cru.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 17 interrupt-parent = <&gic>; 27 #address-cells = <1>; [all …]
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H A D | rk3128.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include <dt-bindings/clock/rk3128-cru.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <1>; 42 arm-pmu { [all …]
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H A D | rk3368.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/clock/rk3368-cru.h> 44 #include <dt-bindings/gpio/gpio.h> 45 #include <dt-bindings/interrupt-controller/irq.h> 46 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/pinctrl/rockchip.h> 48 #include <dt-bindings/thermal/thermal.h> 49 #include <dt-bindings/memory/rk3368-dmc.h> 53 interrupt-parent = <&gic>; 54 #address-cells = <2>; [all …]
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H A D | rk3328.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3328-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 33 #address-cells = <2>; [all …]
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H A D | rk3288.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power-domain/rk3288.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/video/rk3288.h> 16 interrupt-parent = <&gic>; [all …]
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H A D | meson-gxl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gx.dtsi" 8 #include <dt-bindings/clock/gxbb-clkc.h> 9 #include <dt-bindings/clock/gxbb-aoclkc.h> 10 #include <dt-bindings/gpio/meson-gxl-gpio.h> 11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 14 compatible = "amlogic,meson-gxl"; 19 compatible = "amlogic,meson-gxl-dwc3"; 20 #address-cells = <2>; 21 #size-cells = <2>; [all …]
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H A D | meson-gxbb.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "meson-gx.dtsi" 7 #include <dt-bindings/gpio/meson-gxbb-gpio.h> 8 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 9 #include <dt-bindings/clock/gxbb-clkc.h> 10 #include <dt-bindings/clock/gxbb-aoclkc.h> 11 #include <dt-bindings/reset/gxbb-aoclkc.h> 14 compatible = "amlogic,meson-gxbb"; 18 compatible = "amlogic,meson-gxbb-usb2-phy"; 19 #phy-cells = <0>; [all …]
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H A D | meson-gx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 21 reserved-memory { 22 #address-cells = <2>; 23 #size-cells = <2>; [all …]
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H A D | rk3399.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd. 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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/openbmc/linux/drivers/iio/adc/ |
H A D | rockchip_saradc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 89 writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC); in rockchip_saradc_start_v1() 92 SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL); in rockchip_saradc_start_v1() 99 if (info->reset) in rockchip_saradc_start_v2() 100 rockchip_saradc_reset_controller(info->reset); in rockchip_saradc_start_v2() 102 writel_relaxed(0xc, info->regs + SARADC_T_DAS_SOC); in rockchip_saradc_start_v2() 103 writel_relaxed(0x20, info->regs + SARADC_T_PD_SOC); in rockchip_saradc_start_v2() 106 writel_relaxed(val, info->regs + SARADC2_END_INT_EN); in rockchip_saradc_start_v2() 111 writel(val, info->regs + SARADC2_CONV_CON); in rockchip_saradc_start_v2() 116 info->data->start(info, chn); in rockchip_saradc_start() [all …]
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/openbmc/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-gxm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gxl.dtsi" 10 compatible = "amlogic,meson-gxm"; 13 cpu-map { 46 capacity-dmips-mhz = <1024>; 50 capacity-dmips-mhz = <1024>; 54 capacity-dmips-mhz = <1024>; 58 capacity-dmips-mhz = <1024>; 63 compatible = "arm,cortex-a53"; 65 enable-method = "psci"; [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk356x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3568-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3568-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; [all …]
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H A D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3368-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3368-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; [all …]
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H A D | rk3308.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/rk3308-cru.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; [all …]
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H A D | px30.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/px30-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/px30-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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H A D | rk3588s.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rk3588-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/power/rk3588-power.h> 10 #include <dt-bindings/reset/rockchip,rk3588-cru.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/ata/ahci.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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