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/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Drealtek,otto-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/realtek,otto-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek Otto GPIO controller
10 - Sander Vanheule <sander@svanheule.net>
11 - Bert Vermeulen <bert@biot.com>
14 Realtek's GPIO controller on their MIPS switch SoCs (Otto platform) consists
15 of two banks of 32 GPIOs. These GPIOs can generate edge-triggered interrupts.
20 allows for GPIO port use.
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/openbmc/linux/drivers/gpio/
H A Dgpio-realtek-otto.c1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/gpio/driver.h>
29 /* Two bits per GPIO in IMR registers */
42 * realtek_gpio_ctrl - Realtek Otto GPIO driver data
45 * @base: Base address of the register block for a GPIO bank
49 * @bank_read: Read a bank setting as a single 32-bit value
50 * @bank_write: Write a bank setting as a single 32-bit value
53 * The DIR, DATA, and ISR registers consist of four 8-bit port values, packed
54 * into a single 32-bit register. Use @bank_read (@bank_write) to get (assign)
55 * a value from (to) these registers. The IMR register consists of four 16-bit
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