/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,rpmhcc.yaml | 7 title: Qualcomm Technologies, Inc. RPMh Clocks 13 Resource Power Manager Hardened (RPMh) manages shared resources on 20 - qcom,qdu1000-rpmh-clk 21 - qcom,sa8775p-rpmh-clk 22 - qcom,sc7180-rpmh-clk 23 - qcom,sc7280-rpmh-clk 24 - qcom,sc8180x-rpmh-clk 25 - qcom,sc8280xp-rpmh-clk 26 - qcom,sdm670-rpmh-clk 27 - qcom,sdm845-rpmh-clk [all …]
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H A D | qcom,sc7280-lpasscorecc.yaml | 130 #include <dt-bindings/clock/qcom,rpmh.h> 148 #include <dt-bindings/clock/qcom,rpmh.h> 162 #include <dt-bindings/clock/qcom,rpmh.h> 177 #include <dt-bindings/clock/qcom,rpmh.h>
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/openbmc/linux/Documentation/devicetree/bindings/regulator/ |
H A D | qcom,rpmh-regulator.yaml | 4 $id: http://devicetree.org/schemas/regulator/qcom,rpmh-regulator.yaml# 7 title: Qualcomm Technologies, Inc. RPMh Regulators 14 rpmh-regulator devices support PMIC regulator management via the Voltage 15 Regulator Manager (VRM) and Oscillator Buffer (XOB) RPMh accelerators. 29 RPMh regulators must be described in two levels of device nodes. The first 31 RPMh device node. The second level describes each regulator within the PMIC 33 RPMh resource. 61 - qcom,pm6150-rpmh-regulators 62 - qcom,pm6150l-rpmh-regulators 63 - qcom,pm6350-rpmh-regulators [all …]
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/openbmc/linux/drivers/clk/qcom/ |
H A D | clk-rpmh.c | 13 #include <soc/qcom/rpmh.h> 16 #include <dt-bindings/clock/qcom,rpmh.h> 23 * @unit: divisor used to convert Hz value to an RPMh msg 24 * @width: multiplier used to convert Hz value to an RPMh msg 36 * struct clk_rpmh - individual rpmh clock data structure 38 * @res_name: resource name for the rpmh clock 40 * @res_addr: base address of the rpmh resource within the RPMh 41 * @res_on_val: rpmh clock enable value 42 * @state: rpmh clock requested state 43 * @aggr_state: rpmh clock aggregated state [all …]
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/openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,qdu1000-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,qdu1000-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on QDU1000 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 35 - $ref: qcom,rpmh-common.yaml# 57 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
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H A D | qcom,rpmh-common.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh-common.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 32 this interconnect to send RPMh commands.
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H A D | qcom,sm8550-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 21 See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h 49 - $ref: qcom,rpmh-common.yaml# 100 - description: RPMH CC IPA clock
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H A D | qcom,sm8450-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). 45 - $ref: qcom,rpmh-common.yaml# 86 - description: RPMH CC IPA clock 107 #include <dt-bindings/clock/qcom,rpmh.h>
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H A D | qcom,sc8280xp-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sc8280xp-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SC8280XP 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). 39 - $ref: qcom,rpmh-common.yaml#
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H A D | qcom,sa8775p-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P 13 RPMh interconnect providers support system bandwidth requirements through 14 RPMh hardware accelerators known as Bus Clock Manager (BCM). 40 - $ref: qcom,rpmh-common.yaml#
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H A D | qcom,sc7280-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SC7280 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). 42 - $ref: qcom,rpmh-common.yaml#
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H A D | qcom,sm6350-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6350-rpmh.yaml# 7 title: Qualcomm SM6350 RPMh Network-On-Chip Interconnect 13 Qualcomm RPMh-based interconnect provider on SM6350. 16 - $ref: qcom,rpmh-common.yaml# 41 $ref: qcom,rpmh-common.yaml#
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H A D | qcom,rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 110 - $ref: qcom,rpmh-common.yaml#
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/openbmc/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,rpmh-rsc.yaml | 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml# 7 title: Qualcomm RPMH RSC 13 Resource Power Manager Hardened (RPMH) is the mechanism for communicating 31 See also:: <dt-bindings/soc/qcom,rpmh-rsc.h> 42 Drivers that want to use the RSC to communicate with RPMH must specify their 47 const: qcom,rpmh-rsc 116 $ref: /schemas/regulator/qcom,rpmh-regulator.yaml# 141 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 144 compatible = "qcom,rpmh-rsc"; 169 #include <dt-bindings/soc/qcom,rpmh-rsc.h> [all …]
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H A D | qcom-stats.yaml | 22 - qcom,rpmh-stats 23 - qcom,sdm845-rpmh-stats 41 # Example of rpmh sleep stats 44 compatible = "qcom,rpmh-stats";
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/openbmc/linux/drivers/pmdomain/qcom/ |
H A D | rpmhpd.c | 15 #include <soc/qcom/rpmh.h> 24 * struct rpmhpd - top level RPMh power domain resource data structure 25 * @dev: rpmh power domain controller device 70 /* RPMH powerdomains */ 209 /* SA8540P RPMH powerdomains */ 228 /* SA8775P RPMH power domains */ 251 /* SDM670 RPMH powerdomains */ 268 /* SDM845 RPMH powerdomains */ 286 /* SDX55 RPMH powerdomains */ 298 /* SDX65 RPMH powerdomains */ [all …]
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/openbmc/linux/drivers/regulator/ |
H A D | qcom-rpmh-regulator.c | 18 #include <soc/qcom/rpmh.h> 20 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 23 * enum rpmh_regulator_type - supported RPMh accelerator types 24 * @VRM: RPMh VRM accelerator which supports voting on enable, voltage, 26 * @XOB: RPMh XOB accelerator which supports voting on the enable state 67 * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations 68 * @regulator_type: RPMh accelerator type used to manage this 96 * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a 98 * @dev: Device pointer for the top-level PMIC RPMh 100 * handle in RPMh write requests. [all …]
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/openbmc/linux/drivers/soc/qcom/ |
H A D | rpmh.c | 21 #include <soc/qcom/rpmh.h> 23 #include "rpmh-internal.h" 160 * __rpmh_write: Cache and send the RPMH request 166 * Cache the RPMH request and send if the state is ACTIVE_ONLY. 212 * rpmh_write_async: Write a set of RPMH commands 219 * Write a set of RPMH commands, the order of commands is maintained 244 * rpmh_write: Write a set of RPMH commands and block until response 306 * rpmh_write_batch: Write multiple sets of RPMH commands and wait for the 371 pr_err("Error(%d) sending RPMH message addr=%#x\n", in rpmh_write_batch() 459 pr_debug("%s: skipping RPMH req: a:%#x s:%#x w:%#x", in rpmh_flush()
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H A D | Kconfig | 150 tristate "Qualcomm RPM-Hardened (RPMH) Communication" 155 Qualcomm Technologies Inc (QTI) SoCs. RPMH communication uses an 161 tristate "Qualcomm RPMh Power domain driver" 164 QCOM RPMh Power domain driver to support power-domains with 166 value to RPMh which then translates it into corresponding voltage
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H A D | trace-rpmh.h | 10 #define TRACE_SYSTEM rpmh 13 #include "rpmh-internal.h" 85 #define TRACE_INCLUDE_FILE trace-rpmh
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/openbmc/linux/drivers/interconnect/qcom/ |
H A D | icc-rpmh.h | 32 * @unit: divisor used to convert bytes/sec bw value to an RPMh msg 33 * @width: multiplier used to convert bytes/sec bw value to an RPMh msg 80 * @addr: address offsets used when voting to RPMH 88 * communicating with RPMh
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H A D | bcm-voter.h | 10 #include <soc/qcom/rpmh.h> 13 #include "icc-rpmh.h"
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H A D | Makefile | 15 icc-rpmh-obj := icc-rpmh.o 43 obj-$(CONFIG_INTERCONNECT_QCOM_RPMH) += icc-rpmh.o
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H A D | sdx55.h | 9 /* 0 was used by MASTER_IPA_CORE, now represented as RPMh clock */ 31 /* 22 was used by SLAVE_IPA_CORE, now represented as RPMh clock */
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/openbmc/linux/Documentation/devicetree/bindings/power/ |
H A D | qcom,rpmpd.yaml | 7 title: Qualcomm RPM/RPMh Power domains 13 For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh 73 // Example 1 (rpmh power domain controller and OPP table):
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