/openbmc/linux/Documentation/devicetree/bindings/arm/rockchip/ |
H A D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/arm/rockchip/pmu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Power Management Unit (PMU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 14 The PMU is used to turn on and off different power domains of the SoCs. 22 - rockchip,px30-pmu 23 - rockchip,rk3066-pmu [all …]
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/openbmc/linux/arch/arm/mach-rockchip/ |
H A D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 35 static struct regmap *pmu; variable 43 ret = regmap_read(pmu, PMU_PWRDN_ST, &val); in pmu_power_domain_is_on() 57 np = dev->of_node; in rockchip_get_core_reset() 85 ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val); in pmu_set_power_domain() 92 ret = -1; in pmu_set_power_domain() 120 if (!sram_base_addr || (has_pmu && !pmu)) { in rockchip_boot_secondary() 121 pr_err("%s: sram or pmu missing for cpu boot\n", __func__); in rockchip_boot_secondary() 122 return -ENXIO; in rockchip_boot_secondary() 128 return -ENXIO; in rockchip_boot_secondary() [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR X11 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&gic>; 33 compatible = "simple-bus"; 34 #address-cells = <1>; 35 #size-cells = <1>; 38 dmac1_s: dma-controller@20018000 { 43 #dma-cells = <1>; 44 arm,pl330-broken-no-flushp; [all …]
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H A D | rk3188.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR X11 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 16 #address-cells = <1>; 17 #size-cells = <0>; 18 enable-method = "rockchip,rk3066-smp"; 22 compatible = "arm,cortex-a9"; 23 next-level-cache = <&L2>; 25 operating-points = < [all …]
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H A D | rk3288.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power-domain/rk3288.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/video/rk3288.h> 16 interrupt-parent = <&gic>; [all …]
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H A D | rk3036.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3036-cru.h> 13 interrupt-parent = <&gic>; 32 arm-pmu { 33 compatible = "arm,cortex-a7-pmu"; 36 interrupt-affinity = <&cpu0>, <&cpu1>; [all …]
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H A D | rk3399.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd. 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
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H A D | rk3328.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3328-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 33 #address-cells = <2>; [all …]
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H A D | rk322x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/pinctrl/rockchip.h> 10 #include <dt-bindings/clock/rk3228-cru.h> 11 #include <dt-bindings/thermal/thermal.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 17 interrupt-parent = <&gic>; [all …]
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H A D | rk3368.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/clock/rk3368-cru.h> 44 #include <dt-bindings/gpio/gpio.h> 45 #include <dt-bindings/interrupt-controller/irq.h> 46 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/pinctrl/rockchip.h> 48 #include <dt-bindings/thermal/thermal.h> 49 #include <dt-bindings/memory/rk3368-dmc.h> 53 interrupt-parent = <&gic>; 54 #address-cells = <2>; [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 33 compatible = "fixed-clock"; 34 clock-frequency = <24000000>; 35 #clock-cells = <0>; [all …]
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H A D | rk3188.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3188-cru.h> 10 #include <dt-bindings/power/rk3188-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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H A D | rk3066a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/rockchip.h> 9 #include <dt-bindings/clock/rk3066a-cru.h> 10 #include <dt-bindings/power/rk3066-power.h> 17 #address-cells = <1>; 18 #size-cells = <0>; 19 enable-method = "rockchip,rk3066-smp"; 23 compatible = "arm,cortex-a9"; 24 next-level-cache = <&L2>; [all …]
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H A D | rk3288.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3288-cru.h> 8 #include <dt-bindings/power/rk3288-power.h> 9 #include <dt-bindings/thermal/thermal.h> 10 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #address-cells = <2>; [all …]
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H A D | rk3036.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/pinctrl/rockchip.h> 7 #include <dt-bindings/clock/rk3036-cru.h> 8 #include <dt-bindings/soc/rockchip,boot-mode.h> 9 #include <dt-bindings/power/rk3036-power.h> 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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H A D | rk3128.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3128-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <1>; 16 #size-cells = <1>; 18 arm-pmu { [all …]
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/openbmc/linux/Documentation/devicetree/bindings/gpu/ |
H A D | arm,mali-utgard.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mali-utgard.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <robh@kernel.org> 11 - Maxime Ripard <mripard@kernel.org> 12 - Heiko Stuebner <heiko@sntech.de> 16 pattern: '^gpu@[a-f0-9]+$' 19 - items: 20 - const: allwinner,sun8i-a23-mali [all …]
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/openbmc/linux/Documentation/devicetree/bindings/sram/ |
H A D | sram.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic on-chip SRAM 10 - Rob Herring <robh@kernel.org> 19 Following the generic-names recommended practice, node names should 30 - mmio-sram 31 - amlogic,meson-gxbb-sram 32 - arm,juno-sram-ns 33 - atmel,sama5d2-securam [all …]
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/openbmc/linux/Documentation/devicetree/bindings/power/ |
H A D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 18 Power domains contained within power-controller node are 20 Documentation/devicetree/bindings/power/power-domain.yaml. 23 "power-domains" property that is a phandle for the 28 const: power-controller [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3368-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3368-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; [all …]
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H A D | rk3399.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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H A D | rk3308.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/rk3308-cru.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; [all …]
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H A D | rk3588s.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rk3588-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/power/rk3588-power.h> 10 #include <dt-bindings/reset/rockchip,rk3588-cru.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/ata/ahci.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/arm/ |
H A D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 21 with updates for 32-bit and 64-bit ARM systems provided in this document. 30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in 59 On 32-bit ARM v7 or later systems this property is 68 On ARM v8 64-bit systems this property is required 71 * If cpus node's #address-cells property is set to 2 79 * If cpus node's #address-cells property is set to 1 [all …]
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/openbmc/linux/drivers/pmdomain/rockchip/ |
H A D | pm-domains.c | 1 // SPDX-License-Identifier: GPL-2.0-only 21 #include <dt-bindings/power/px30-power.h> 22 #include <dt-bindings/power/rockchip,rv1126-power.h> 23 #include <dt-bindings/power/rk3036-power.h> 24 #include <dt-bindings/power/rk3066-power.h> 25 #include <dt-bindings/power/rk3128-power.h> 26 #include <dt-bindings/power/rk3188-power.h> 27 #include <dt-bindings/power/rk3228-power.h> 28 #include <dt-bindings/power/rk3288-power.h> 29 #include <dt-bindings/power/rk3328-power.h> [all …]
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