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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dcpsw.txt2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
15 - ale_entries : Specifies No of entries ALE can hold
16 - bd_ram_size : Specifies internal descriptor RAM size
[all …]
H A Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
20 local-mac-address:
23 $ref: /schemas/types.yaml#/definitions/uint8-array
27 mac-address:
32 local-mac-address property.
33 $ref: /schemas/types.yaml#/definitions/uint8-array
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H A Dadi,adin.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Tachici <alexandru.tachici@analog.com>
16 - $ref: ethernet-phy.yaml#
19 adi,rx-internal-delay-ps:
21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
26 adi,tx-internal-delay-ps:
28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
[all …]
H A Damlogic,meson-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
20 - amlogic,meson6-dwmac
21 - amlogic,meson8b-dwmac
22 - amlogic,meson8m2-dwmac
23 - amlogic,meson-gxbb-dwmac
[all …]
H A Dmotorcomm,yt8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Sae <frank.sae@motor-comm.com>
13 - $ref: ethernet-phy.yaml#
18 - ethernet-phy-id4f51.e91a
19 - ethernet-phy-id4f51.e91b
21 rx-internal-delay-ps:
23 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
[all …]
/openbmc/u-boot/doc/device-tree-bindings/net/
H A Dethernet.txt3 - local-mac-address: array of 6 bytes, specifies the MAC address that was
5 - mac-address: array of 6 bytes, specifies the MAC address that was last used by
7 the device by the boot program is different from the "local-mac-address"
9 - max-speed: number, specifies maximum speed in Mbit/s supported by the device;
10 - max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
12 - phy-mode: string, operation mode of the PHY interface; supported values are
13 "mii", "gmii", "sgmii", "qsgmii", "tbi", "rev-mii", "rmii", "rgmii", "rgmii-id",
14 "rgmii-rxid", "rgmii-txid", "rtbi", "smii", "xgmii"; this is now a de-facto
16 - phy-connection-type: the same as "phy-mode" property but described in ePAPR;
17 - phy-handle: phandle, specifies a reference to a node representing a PHY
[all …]
H A Dfsl-tsec-phy.txt1 * TSEC-compatible ethernet nodes
5 - compatible : Should be "fsl,tsec"
6 - reg : Offset and length of the register set for the device
7 - phy-handle : See ethernet.txt file in the same directory.
8 - phy-connection-type : See ethernet.txt file in the same directory. This
9 property is only really needed if the connection is of type "rgmii-id",
10 "rgmii-rxid" and "rgmii-txid" as all other connection types are detected
17 phy-handle = <&phy0>;
18 phy-connection-type = "sgmii";
30 - compatible : Should define the compatible device type for the
[all …]
/openbmc/u-boot/include/
H A Dphy_interface.h1 /* SPDX-License-Identifier: GPL-2.0+ */
44 [PHY_INTERFACE_MODE_SGMII_2500] = "sgmii-2500",
48 [PHY_INTERFACE_MODE_RGMII] = "rgmii",
49 [PHY_INTERFACE_MODE_RGMII_ID] = "rgmii-id",
50 [PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid",
51 [PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid",
58 [PHY_INTERFACE_MODE_25G_AUI] = "25g-aui",
62 [PHY_INTERFACE_MODE_NCSI] = "NC-SI",
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-class-net-phydev24 This attribute contains the 32-bit PHY Identifier as reported
41 <empty> (not available), mii, gmii, sgmii, tbi, rev-mii,
42 rmii, rgmii, rgmii-id, rgmii-rxid, rgmii-txid, rtbi, smii
43 xgmii, moca, qsgmii, trgmii, 1000base-x, 2500base-x, rxaui,
44 xaui, 10gbase-kr, unknown
60 32-bit hexadecimal number representing a bit mask of the
/openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
H A Ducc.txt4 - device_type : should be "network", "hldc", "uart", "transparent"
6 - compatible : could be "ucc_geth" or "fsl_atm" and so on.
7 - cell-index : the ucc number(1-8), corresponding to UCCx in UM.
8 - reg : Offset and length of the register set for the device
9 - interrupts : <a b> where a is the interrupt number and b is a
14 - pio-handle : The phandle for the Parallel I/O port configuration.
15 - port-number : for UART drivers, the port number to use, between 0 and 3.
18 CPM UART driver, the port-number is required for the QE UART driver.
19 - soft-uart : for UART drivers, if specified this means the QE UART device
20 driver should use "Soft-UART" mode, which is needed on some SOCs that have
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmicrochip,lan937x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - UNGLinuxDriver@microchip.com
13 - $ref: dsa.yaml#/$defs/ethernet-ports
18 - microchip,lan9370
19 - microchip,lan9371
20 - microchip,lan9372
21 - microchip,lan9373
22 - microchip,lan9374
[all …]
H A Dbrcm,b53.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <f.fainelli@gmail.com>
18 - const: brcm,bcm5325
19 - const: brcm,bcm53115
20 - const: brcm,bcm53125
21 - const: brcm,bcm53128
22 - const: brcm,bcm53134
23 - const: brcm,bcm5365
[all …]
H A Dnxp,sja1105.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at
16 - Vladimir Oltean <vladimir.oltean@nxp.com>
21 - nxp,sja1105e
22 - nxp,sja1105t
23 - nxp,sja1105p
24 - nxp,sja1105q
25 - nxp,sja1105r
[all …]
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64-pine64-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include "sun50i-a64-pine64.dts"
8 compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
14 pinctrl-names = "default";
15 pinctrl-0 = <&rgmii_pins>;
16 phy-mode = "rgmii-txid";
17 phy-handle = <&ext_rgmii_phy>;
22 ext_rgmii_phy: ethernet-phy@1 {
23 compatible = "ethernet-phy-ieee802.3-c22";
34 regulator-enable-ramp-delay = <100000>;
H A Dsun50i-a64-sopine-baseboard.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // Based on sun50i-a64-pine64.dts, which is:
6 /dts-v1/;
8 #include "sun50i-a64-sopine.dtsi"
12 compatible = "pine64,sopine-baseboard", "pine64,sopine",
13 "allwinner,sun50i-a64";
25 stdout-path = "serial0:115200n8";
28 hdmi-connector {
29 compatible = "hdmi-connector";
34 remote-endpoint = <&hdmi_out_con>;
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-l-50.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Check Point L-50 Board Description
7 /dts-v1/;
10 #include "kirkwood-6281.dtsi"
13 model = "Check Point L-50";
14 compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
23 stdout-path = &uart0;
27 pinctrl: pin-controller@10000 {
28 pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
29 pinctrl-names = "default";
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dr8a77990-ebisu.dts1 /* SPDX-License-Identifier: GPL-2.0 */
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
23 stdout-path = "serial0:115200n8";
34 pinctrl-0 = <&avb_pins>;
35 pinctrl-names = "default";
36 renesas,no-ether-link;
37 phy-handle = <&phy0>;
38 phy-mode = "rgmii-txid";
41 phy0: ethernet-phy@0 {
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s905d-vero4k-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxl-s905d.dtsi"
9 #include "meson-gx-p23x-q20x.dtsi"
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
14 compatible = "osmc,vero4k-plus", "amlogic,s905d", "amlogic,meson-gxl";
17 gpio-keys-polled {
18 compatible = "gpio-keys-polled";
19 poll-interval = <20>;
[all …]
H A Dmeson-sm1-x96-air-gbit.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1-ac2xx.dtsi"
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
13 compatible = "amediatech,x96-air-gbit", "amlogic,sm1";
17 compatible = "amlogic,axg-sound-card";
18 model = "X96-AIR";
19 audio-aux-devs = <&tdmout_b>;
20 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
25 assigned-clocks = <&clkc CLKID_MPLL2>,
[all …]
H A Dmeson-sm1-a95xf3-air-gbit.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1-ac2xx.dtsi"
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
13 compatible = "cyx,a95xf3-air-gbit", "amlogic,sm1";
14 model = "Shenzhen CYX Industrial Co., Ltd A95XF3-AIR";
17 compatible = "amlogic,axg-sound-card";
18 model = "A95XF3-AIR";
19 audio-aux-devs = <&tdmout_b>;
20 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
[all …]
H A Dmeson-sm1-h96-max.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1-ac2xx.dtsi"
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
13 compatible = "haochuangyi,h96-max", "amlogic,sm1";
17 compatible = "amlogic,axg-sound-card";
18 model = "H96-MAX";
19 audio-aux-devs = <&tdmout_b>;
20 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
25 assigned-clocks = <&clkc CLKID_MPLL2>,
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d3_ksz9477_evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 /dts-v1/;
9 model = "EVB-KSZ9477";
10 compatible = "microchip,sama5d3-ksz9477-evb", "atmel,sama5d36",
14 stdout-path = &dbgu;
17 reg_3v3: regulator-3v3 {
18 compatible = "regulator-fixed";
19 regulator-name = "3v3";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/vf/
H A Dvf610-zii-dev-rev-b.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
21 mdio-parent-bus = <&mdio1>;
22 #address-cells = <1>;
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam437x-cm-t43.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
6 /dts-v1/;
8 #include <dt-bindings/pinctrl/am43xx.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 model = "CompuLab CM-T43";
15 compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
18 compatible = "gpio-leds";
21 label = "cm-t43:green";
[all …]

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