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/openbmc/qemu/hw/misc/
H A Dxlnx-versal-crl.c2 * QEMU model of the Clock-Reset-LPD (CRL).
5 * SPDX-License-Identifier: GPL-2.0-or-later
15 #include "hw/qdev-properties.h"
21 #include "target/arm/arm-powerctl.h"
23 #include "hw/misc/xlnx-versal-crl.h"
31 bool pending = s->regs[R_IR_STATUS] & ~s->regs[R_IR_MASK]; in crl_update_irq()
32 qemu_set_irq(s->irq, pending); in crl_update_irq()
37 XlnxVersalCRL *s = XLNX_VERSAL_CRL(reg->opaque); in crl_status_postw()
43 XlnxVersalCRL *s = XLNX_VERSAL_CRL(reg->opaque); in crl_enable_prew()
46 s->regs[R_IR_MASK] &= ~val; in crl_enable_prew()
[all …]
H A Dxlnx-zynqmp-crf.c2 * QEMU model of the CRF - Clock Reset FPD.
5 * SPDX-License-Identifier: GPL-2.0-or-later
16 #include "hw/misc/xlnx-zynqmp-crf.h"
17 #include "target/arm/arm-powerctl.h"
27 bool pending = s->regs[R_IR_STATUS] & ~s->regs[R_IR_MASK]; in ir_update_irq()
28 qemu_set_irq(s->irq_ir, pending); in ir_update_irq()
33 XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(reg->opaque); in ir_status_postw()
39 XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(reg->opaque); in ir_enable_prew()
42 s->regs[R_IR_MASK] &= ~val; in ir_enable_prew()
49 XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(reg->opaque); in ir_disable_prew()
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H A Dxlnx-versal-pmc-iou-slcr.c33 #include "hw/qdev-properties.h"
34 #include "hw/misc/xlnx-versal-pmc-iou-slcr.h"
763 bool pending = s->regs[R_PARITY_ISR] & ~s->regs[R_PARITY_IMR]; in parity_imr_update_irq()
764 qemu_set_irq(s->irq_parity_imr, pending); in parity_imr_update_irq()
769 XlnxVersalPmcIouSlcr *s = XILINX_VERSAL_PMC_IOU_SLCR(reg->opaque); in parity_isr_postw()
775 XlnxVersalPmcIouSlcr *s = XILINX_VERSAL_PMC_IOU_SLCR(reg->opaque); in parity_ier_prew()
778 s->regs[R_PARITY_IMR] &= ~val; in parity_ier_prew()
785 XlnxVersalPmcIouSlcr *s = XILINX_VERSAL_PMC_IOU_SLCR(reg->opaque); in parity_idr_prew()
788 s->regs[R_PARITY_IMR] |= val; in parity_idr_prew()
795 XlnxVersalPmcIouSlcr *s = XILINX_VERSAL_PMC_IOU_SLCR(reg->opaque); in parity_itr_prew()
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/openbmc/linux/drivers/accel/habanalabs/include/gaudi2/
H A Dgaudi2_async_ids_map_extended.h1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2018-2022 HabanaLabs, Ltd.
9 ** This is an auto-generated file **
27 int reset; member
28 char name[64]; member
32 { .fc_id = 0, .cpu_id = 0, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
33 .name = "" },
34 { .fc_id = 1, .cpu_id = 1, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
35 .name = "" },
36 { .fc_id = 2, .cpu_id = 2, .valid = 0, .msg = 0, .reset = EVENT_RESET_TYPE_NONE,
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/openbmc/linux/drivers/pmdomain/ti/
H A Domap_prm.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
6 * Tero Kristo <t-kristo@ti.com>
19 #include <linux/reset-controller.h>
22 #include <linux/platform_data/ti-prm.h>
33 unsigned long statechange:1; /* Optional low-power state change */
55 const char *name; member
139 { .rst = -1 },
145 { .rst = -1 },
152 { .rst = -1 },
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/openbmc/linux/drivers/clk/bcm/
H A Dclk-bcm63268-timer.c1 // SPDX-License-Identifier: GPL-2.0
3 * BCM63268 Timer Clock and Reset Controller Driver
8 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/bcm63268-clock.h>
31 const char * const name; member
37 .name = "ephy1",
40 .name = "ephy2",
43 .name = "ephy3",
46 .name = "gphy1",
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/openbmc/bmcweb/redfish-core/schema/dmtf/csdl/
H A DPortMetrics_v1.xml1 <?xml version="1.0" encoding="UTF-8"?>
2 <!---->
3 <!--################################################################################ -->
4 <!--# Redfish Schema: PortMetrics v1.7.0 -->
5 <!--# -->
6 <!--# For a detailed change log, see the README file contained in the DSP8010 bundle, -->
7 <!--# available at http://www.dmtf.org/standards/redfish -->
8 <!--# Copyright 2014-2024 DMTF. -->
9 <!--# For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright -->
10 <!--################################################################################ -->
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H A DNetworkAdapterMetrics_v1.xml1 <?xml version="1.0" encoding="UTF-8"?>
2 <!---->
3 <!--################################################################################ -->
4 <!--# Redfish Schema: NetworkAdapterMetrics v1.1.0 -->
5 <!--# -->
6 <!--# For a detailed change log, see the README file contained in the DSP8010 bundle, -->
7 <!--# available at http://www.dmtf.org/standards/redfish -->
8 <!--# Copyright 2014-2024 DMTF. -->
9 <!--# For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright -->
10 <!--################################################################################ -->
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H A DAggregationService_v1.xml1 <?xml version="1.0" encoding="UTF-8"?>
2 <!---->
3 <!--################################################################################ -->
4 <!--# Redfish Schema: AggregationService v1.0.3 -->
5 <!--# -->
6 <!--# For a detailed change log, see the README file contained in the DSP8010 bundle, -->
7 <!--# available at http://www.dmtf.org/standards/redfish -->
8 <!--# Copyright 2014-2024 DMTF. -->
9 <!--# For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright -->
10 <!--################################################################################ -->
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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stpmic1.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - pascal Paillet <p.paillet@foss.st.com>
24 "#interrupt-cells":
27 interrupt-controller: true
36 const: st,stpmic1-onkey
40 - description: onkey-falling, happens when onkey is pressed. IT_PONKEY_F of pmic
41 - description: onkey-rising, happens when onkey is released. IT_PONKEY_R of pmic
43 interrupt-names:
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/openbmc/linux/drivers/gpio/
H A Dgpiolib-of.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2007-2008 MontaVista Software, Inc.
26 #include "gpiolib-of.h"
29 * This is Linux-specific flags. By default controllers' and Linux' mapping
31 * Linux-specific in their .xlate callback. Though, 1:1 mapping is recommended.
44 * of_gpio_named_count() - Count GPIOs for a device
46 * @propname: property name containing gpio specifier(s)
51 * -EINVAL for an incorrectly formed gpios property, or
52 * -ENOENT for a missing gpios property
66 return of_count_phandle_with_args(np, propname, "#gpio-cells"); in of_gpio_named_count()
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/openbmc/linux/drivers/clk/
H A Dclk-aspeed.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 #include <linux/clk-provider.h>
10 #include <linux/reset-controller.h>
17 * struct aspeed_gate_data - Aspeed gated clocks
19 * @reset_idx: bit used to reset this IP in the reset register. -1 if no
20 * reset is required when enabling the clock
21 * @name: the clock name
22 * @parent_name: the name of the parent clock
28 const char *name; member
34 * struct aspeed_clk_gate - Aspeed specific clk_gate structure
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/openbmc/linux/include/linux/
H A Dreset.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * struct reset_control_bulk_data - Data used for bulk reset control operations.
16 * @id: reset control consumer ID
17 * @rstc: struct reset_control * to store the associated reset control
19 * The reset APIs provide a series of reset_control_bulk_*() API calls as
20 * a convenience to consumers which require multiple reset controls.
114 return optional ? 0 : -ENOTSUPP; in __device_reset()
122 return optional ? NULL : ERR_PTR(-ENOTSUPP); in __of_reset_control_get()
130 return optional ? NULL : ERR_PTR(-ENOTSUPP); in __reset_control_get()
167 return optional ? 0 : -EOPNOTSUPP; in __reset_control_bulk_get()
[all …]
H A Dreset-controller.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * struct reset_control_ops - reset controller driver callbacks
12 * @reset: for self-deasserting resets, does all necessary
13 * things to reset the device
14 * @assert: manually assert the reset line, if supported
15 * @deassert: manually deassert the reset line, if supported
16 * @status: return the status of the reset line, if supported
19 int (*reset)(struct reset_controller_dev *rcdev, unsigned long id); member
30 * struct reset_control_lookup - represents a single lookup entry
32 * @list: internal list of all reset lookup entries
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Chassis/Buttons/
H A DReset.interface.yaml2 Reset button control service
4 - name: simPress
6 Emulate reset button press.
8 - xyz.openbmc_project.Chassis.Common.Error.UnsupportedCommand
9 - xyz.openbmc_project.Chassis.Common.Error.IOError
12 - name: Enabled
16 Enable/disable reset button. false means reset button is disabled true
17 means reset button is enabled
19 - xyz.openbmc_project.Chassis.Common.Error.UnsupportedCommand
20 - xyz.openbmc_project.Chassis.Common.Error.IOError
[all …]
/openbmc/u-boot/include/
H A Dreset.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 * A reset is a hardware signal indicating that a HW module (or IP block, or
13 * sometimes an entire off-CPU chip) reset all of its internal state to some
14 * known-good initial state. Drivers will often reset HW modules when they
16 * or in response to some error condition. Reset signals are often controlled
17 * externally to the HW module being reset, by an entity this API calls a reset
19 * reset controllers set or clear reset signals.
21 * A driver that implements UCLASS_RESET is a reset controller or provider. A
22 * controller will often implement multiple separate reset signals, since the
23 * hardware it manages often has this capability. reset-uclass.h describes the
[all …]
/openbmc/linux/drivers/mfd/
H A Dmadera-core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2015-2018 Cirrus Logic
50 .name = "madera-ldo1",
62 { .name = "madera-pinctrl", },
63 { .name = "madera-irq", },
64 { .name = "madera-gpio", },
66 .name = "madera-extcon",
71 .name = "cs47l15-codec",
86 { .name = "madera-pinctrl", },
87 { .name = "madera-irq", },
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/openbmc/linux/drivers/reset/
H A Dreset-microchip-sparx5.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Microchip Sparx5 Switch Reset driver
7 * https://github.com/microchip-ung/sparx-5_reginfo
15 #include <linux/reset-controller.h>
41 /* Make sure the core is PROTECTED from reset */ in sparx5_switch_reset()
42 regmap_update_bits(ctx->cpu_ctrl, ctx->props->protect_reg, in sparx5_switch_reset()
43 ctx->props->protect_bit, ctx->props->protect_bit); in sparx5_switch_reset()
45 /* Start soft reset */ in sparx5_switch_reset()
46 regmap_write(ctx->gcb_ctrl, ctx->props->reset_reg, in sparx5_switch_reset()
47 ctx->props->reset_bit); in sparx5_switch_reset()
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/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-g12-common.dtsi"
8 #include <dt-bindings/clock/axg-audio-clkc.h>
9 #include <dt-bindings/power/meson-g12a-power.h>
10 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
11 #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
14 tdmif_a: audio-controller-0 {
15 compatible = "amlogic,axg-tdm-iface";
16 #sound-dai-cells = <0>;
17 sound-name-prefix = "TDM_A";
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/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/
H A D0003-dt-bindings-remoteproc-Add-Arm-remoteproc.patch4 Subject: [PATCH 3/6] dt-bindings: remoteproc: Add Arm remoteproc
8 Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
9 Upstream-Status: Denied [Agreement reached: https://lore.kernel.org/all/20241009094635.GA14639@e130…
10 ---
16 diff --git a/Documentation/devicetree/bindings/remoteproc/arm,rproc.yaml b/Documentation/devicetree…
19 --- /dev/null
21 @@ -0,0 +1,69 @@
22 +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
24 +---
26 +$schema: http://devicetree.org/meta-schemas/core.yaml#
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/openbmc/qemu/hw/usb/
H A Dhcd-dwc3.c7 * only supporting core reset and read of ID register.
36 #include "hw/qdev-properties.h"
37 #include "hw/usb/hcd-dwc3.h"
352 * We reset all CSR regs except GCTL, GUCTL, GSTS, GSNPSID, GGPIO, GUID, in reset_csr()
375 register_reset(&s->regs_info[i]); in reset_csr()
380 xhci_sysbus_reset(DEVICE(&s->sysbus_xhci)); in reset_csr()
385 USBDWC3 *s = USB_DWC3(reg->opaque); in usb_dwc3_gctl_postw()
387 if (ARRAY_FIELD_EX32(s->regs, GCTL, CORESOFTRESET)) { in usb_dwc3_gctl_postw()
394 USBDWC3 *s = USB_DWC3(reg->opaque); in usb_dwc3_guid_postw()
396 s->regs[R_GUID] = s->cfg.dwc_usb3_user; in usb_dwc3_guid_postw()
[all …]
/openbmc/linux/drivers/media/pci/cx23885/
H A Dcx23885-cards.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <media/drv-intf/cx25840.h>
19 #include "netup-eeprom.h"
20 #include "netup-init.h"
21 #include "altera-ci.h"
24 #include "cx23888-ir.h"
29 "NetUP Dual DVB-T/C CI card revision");
35 "\t\t\tHVR-1250 (reported safe)\n"
41 /* ------------------------------------------------------------------ */
46 .name = "UNKNOWN/GENERIC",
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/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_hangcheck.c1 // SPDX-License-Identifier: MIT
47 h->gt = gt; in hang_init()
49 h->ctx = kernel_context(gt->i915, NULL); in hang_init()
50 if (IS_ERR(h->ctx)) in hang_init()
51 return PTR_ERR(h->ctx); in hang_init()
53 GEM_BUG_ON(i915_gem_context_is_bannable(h->ctx)); in hang_init()
55 h->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
56 if (IS_ERR(h->hws)) { in hang_init()
57 err = PTR_ERR(h->hws); in hang_init()
61 h->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
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/openbmc/openbmc-test-automation/ipmi/
H A Dtest_ipmi_cold_reset.robot2 Documentation This suite tests IPMI Cold Reset in OpenBMC.
4 ... The Cold reset command directs the Responder to perform
5 ... a 'Cold Reset' action, which causes default setting of
10 ... - Cold_Reset_Via_IPMI
11 ... - Cold_Reset_With_Invalid_Data_Request_Via_IPMI
12 ... - Verify_Cold_Reset_Impact_On_Sensor_Threshold_Via_IPMI
14 ... The script verifies command execution for cold reset,
15 ... invalid data request verification of cold reset and
16 ... impact on sensor threshold value change with cold reset.
19 ... executes cold reset IPMI command,
[all …]
/openbmc/bmcweb/redfish-core/schema/dmtf/installed/
H A DAggregationService_v1.xml1 <?xml version="1.0" encoding="UTF-8"?>
2 <!---->
3 <!--################################################################################ -->
4 <!--# Redfish Schema: AggregationService v1.0.3 -->
5 <!--# -->
6 <!--# For a detailed change log, see the README file contained in the DSP8010 bundle, -->
7 <!--# available at http://www.dmtf.org/standards/redfish -->
8 <!--# Copyright 2014-2024 DMTF. -->
9 <!--# For the full DMTF copyright policy, see http://www.dmtf.org/about/policies/copyright -->
10 <!--################################################################################ -->
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