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/openbmc/linux/drivers/power/reset/
H A Dsyscon-reboot-mode.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/reboot.h>
14 #include <linux/reboot-mode.h>
18 struct reboot_mode_driver reboot; member
19 u32 offset; member
23 static int syscon_reboot_mode_write(struct reboot_mode_driver *reboot, in syscon_reboot_mode_write() argument
29 syscon_rbm = container_of(reboot, struct syscon_reboot_mode, reboot); in syscon_reboot_mode_write()
31 ret = regmap_update_bits(syscon_rbm->map, syscon_rbm->offset, in syscon_reboot_mode_write()
32 syscon_rbm->mask, magic); in syscon_reboot_mode_write()
34 dev_err(reboot->dev, "update reboot mode bits failed\n"); in syscon_reboot_mode_write()
[all …]
H A Dsyscon-reboot.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Generic Syscon Reboot Driver
14 #include <linux/reboot.h>
19 u32 offset; member
32 /* Issue the reboot */ in syscon_restart_handle()
33 regmap_update_bits(ctx->map, ctx->offset, ctx->mask, ctx->value); in syscon_restart_handle()
44 struct device *dev = &pdev->dev; in syscon_reboot_probe()
49 ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); in syscon_reboot_probe()
51 return -ENOMEM; in syscon_reboot_probe()
53 ctx->map = syscon_regmap_lookup_by_phandle(dev->of_node, "regmap"); in syscon_reboot_probe()
[all …]
H A Dhisi-reboot.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/reboot.h>
19 #include <asm/proc-fns.h>
42 struct device_node *np = pdev->dev.of_node; in hisi_reboot_probe()
48 return -ENODEV; in hisi_reboot_probe()
51 if (of_property_read_u32(np, "reboot-offset", &reboot_offset) < 0) { in hisi_reboot_probe()
52 pr_err("failed to find reboot-offset property\n"); in hisi_reboot_probe()
54 return -EINVAL; in hisi_reboot_probe()
59 dev_err(&pdev->dev, "cannot register restart handler (err=%d)\n", in hisi_reboot_probe()
76 .name = "hisi-reboot",
H A Dbrcmstb-reboot.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <linux/reboot.h>
41 rc = regmap_write(regmap, rst_src_en, reset_masks->rst_src_en_mask); in brcmstb_restart_handler()
53 rc = regmap_write(regmap, sw_mstr_rst, reset_masks->sw_mstr_rst_mask); in brcmstb_restart_handler()
84 { .compatible = "brcm,brcmstb-reboot", .data = &reset_bits_40nm },
85 { .compatible = "brcm,bcm7038-reboot", .data = &reset_bits_65nm },
92 struct device_node *np = pdev->dev.of_node; in brcmstb_reboot_probe()
98 return -EINVAL; in brcmstb_reboot_probe()
100 reset_masks = of_id->data; in brcmstb_reboot_probe()
105 return -EINVAL; in brcmstb_reboot_probe()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/power/reset/
H A Dsyscon-reboot.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
15 defined by the SYSCON register map base plus the offset with the value and
16 mask defined in the reboot node. Default will be little endian mode, 32 bit
18 parental dt-node. So the SYSCON reboot node should be represented as a
19 sub-node of a "syscon", "simple-mfd" node. Though the regmap property
24 const: syscon-reboot
[all …]
H A Dsyscon-reboot-mode.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/power/reset/syscon-reboot-mode.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic SYSCON reboot mode driver
10 - Sebastian Reichel <sre@kernel.org>
13 This driver gets reboot mode magic value from reboot-mode driver
17 parental dt-node plus the offset. So the SYSCON reboot-mode node
18 should be represented as a sub-node of a "syscon", "simple-mfd" node.
22 const: syscon-reboot-mode
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/openbmc/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dsysctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wei Xu <xuwei5@hisilicon.com>
14 used to assist the slave core startup, reboot the system, etc.
19 offset. In addition, the HiP01 system controller has some specific control
23 Hisilicon system controller --> hisilicon,sysctrl
24 HiP01 system controller --> hisilicon,hip01-sysctrl
25 Hi6220 system controller --> hisilicon,hi6220-sysctrl
26 Hi3519 system controller --> hisilicon,hi3519-sysctrl
[all …]
/openbmc/linux/arch/arm/mach-zynq/
H A Dslcr.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2011-2013 Xilinx Inc.
9 #include <linux/reboot.h>
20 #define SLCR_REBOOT_STATUS_OFFSET 0x258 /* PS Reboot Status */
34 * zynq_slcr_write - Write to a register in SLCR block
37 * @offset: Register offset in SLCR block
41 static int zynq_slcr_write(u32 val, u32 offset) in zynq_slcr_write() argument
43 return regmap_write(zynq_slcr_regmap, offset, val); in zynq_slcr_write()
47 * zynq_slcr_read - Read a register in SLCR block
50 * @offset: Register offset in SLCR block
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/openbmc/linux/arch/x86/platform/ce4100/
H A Dce4100.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/reboot.h>
20 #include <asm/emergency-restart.h>
25 * intention to reset, reboot or power off the system. This 8051 device has
36 static unsigned int mem_serial_in(struct uart_port *p, int offset) in mem_serial_in() argument
38 offset = offset << p->regshift; in mem_serial_in()
39 return readl(p->membase + offset); in mem_serial_in()
49 * errata number 9 in Errata - B step.
52 static unsigned int ce4100_mem_serial_in(struct uart_port *p, int offset) in ce4100_mem_serial_in() argument
56 if (offset == UART_IIR) { in ce4100_mem_serial_in()
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/openbmc/linux/Documentation/devicetree/bindings/arm/bcm/
H A Dbrcm,bcm63138.txt1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
2 -----------------------------------------------------------
4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
14 'enable-method' property.
17 - compatible: should be "brcm,bcm63138-bootlut"
18 - reg: register base address and length for the Boot Lookup table
21 - enable-method: should be "brcm,bcm63138"
24 - enable-method: should be "brcm,bcm63138"
25 - resets: phandle to the relevant PMB controller, one integer indicating the internal
[all …]
H A Dbrcm,brcmstb.txt2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
23 - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos-syscon-restart.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos SoC syscon reboot/poweroff nodes common definition.
7 poweroff: syscon-poweroff {
8 compatible = "syscon-poweroff";
10 offset = <0x330c>; /* PS_HOLD_CONTROL */
14 reboot: syscon-reboot { label
15 compatible = "syscon-reboot";
17 offset = <0x0400>; /* SWRESET */
/openbmc/linux/Documentation/devicetree/bindings/soc/loongson/
H A Dloongson,ls2k-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/loongson/loongson,ls2k-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 Power Manager controller
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
15 - items:
16 - const: loongson,ls2k0500-pmc
17 - const: syscon
18 - items:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dti,nspire-misc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mfd/ti,nspire-misc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Davis <afd@ti.com>
22 - enum:
23 - ti,nspire-misc
24 - const: syscon
25 - const: simple-mfd
[all …]
H A Dcanaan,k210-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Damien Le Moal <dlemoal@kernel.org>
20 - const: canaan,k210-sysctl
21 - const: syscon
22 - const: simple-mfd
29 clock-names:
31 - const: pclk
[all …]
/openbmc/u-boot/drivers/sysreset/
H A Dsysreset_syscon.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Derived from linux/drivers/power/reset/syscon-reboot.c:
19 unsigned int offset; member
27 regmap_write(priv->regmap, priv->offset, priv->mask); in syscon_reboot_request()
29 return -EINPROGRESS; in syscon_reboot_request()
49 return -EINVAL; in syscon_reboot_probe()
51 priv->regmap = syscon_node_to_regmap(node); in syscon_reboot_probe()
52 if (!priv->regmap) { in syscon_reboot_probe()
54 return -ENODEV; in syscon_reboot_probe()
57 priv->offset = dev_read_u32_default(dev, "offset", 0); in syscon_reboot_probe()
[all …]
/openbmc/openpower-host-ipmi-oem/
H A Doemhandler.cpp5 #include "elog-errors.hpp"
11 #include <systemd/sd-bus.h>
13 #include <host-interface.hpp>
14 #include <ipmid-host/cmd.hpp>
54 return find->second; in mapSeverity()
65 uint8_t sensor = rec->sensorNum; in mapCalloutAssociation()
77 return found->first; in mapCalloutAssociation()
116 return response.begin()->first;
190 /** @brief Helper function to do a graceful restart (reboot) of the BMC.
191 @return 0 on success, -
200 std::variant<std::string> reboot = rebootBMC() local
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/openbmc/linux/drivers/firmware/efi/libstub/
H A Dtpm.c1 // SPDX-License-Identifier: GPL-2.0
24 * Enable reboot attack mitigation. This requests that the firmware clear the
25 * RAM on next reboot before proceeding with boot, ensuring that any secrets
27 * from RAM before reboot it can simply reset this variable.
101 * back into a size is contained in the first entry - in efi_retrieve_tpm2_eventlog()
112 ((struct tcpa_event *) last_entry_addr)->event_size; in efi_retrieve_tpm2_eventlog()
114 log_size = log_last_entry - log_location + last_entry_size; in efi_retrieve_tpm2_eventlog()
132 if (final_events_table && final_events_table->nr_events) { in efi_retrieve_tpm2_eventlog()
134 int offset; in efi_retrieve_tpm2_eventlog() local
137 int i = final_events_table->nr_events; in efi_retrieve_tpm2_eventlog()
[all …]
/openbmc/u-boot/include/
H A Dcros_ec.h1 /* SPDX-License-Identifier: GPL-2.0+ */
25 * These two buffers will always be dword-aligned and include enough
26 * space for up to 7 word-alignment bytes also, so we can ensure that
27 * the body of the message is always dword-aligned (64-bit).
40 * Hard-code the number of columns we happen to know we have right now. It
55 * Byte value of erased flash, or -1 if not known. It is normally
63 * Read the ID of the CROS-EC device
65 * The ID is a string identifying the CROS-EC device.
67 * @param dev CROS-EC device
70 * @return 0 if ok, -1 on error
[all …]
/openbmc/u-boot/cmd/
H A Dcros_ec.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include <dm/device-internal.h>
14 #include <dm/uclass-internal.h>
24 * @return flash region (EC_FLASH_REGION_...) or -1 on error
39 return -1; in cros_ec_decode_region()
45 * @param dev CROS-EC device to read/write
49 * @return 0 for ok, 1 for a usage error or -ve for ec command error
55 uint32_t offset, size = -1U, region_size; in do_read_write() local
61 region = cros_ec_decode_region(argc - 2, argv + 2); in do_read_write()
62 if (region == -1) in do_read_write()
[all …]
/openbmc/openbmc-test-automation/redfish/managers/
H A Dtest_managers_bmc_time.robot16 ${date_time_with_offset} 2019-04-25T26:24:46+00:00
17 ${invalid_datetime} 2019-04-251T12:24:46+00:00
57 Verify Set DateTime With Offset Using Redfish
58 [Documentation] Verify set DateTime with offset using redfish API.
72 Verify DateTime Persists After Reboot
73 [Documentation] Verify date persists after BMC reboot.
79 Redfish OBMC Reboot (off)
/openbmc/qemu/tests/qtest/fuzz/
H A Di440fx_fuzz.c10 * See the COPYING file in the top-level directory.
15 #include "qemu/main-loop.h"
18 #include "tests/qtest/libqos/pci-pc.h"
45 * opcode, address offset and value in ioport_fuzz_qtest()
54 /* make a copy of the action so we can normalize the values in-place */ in ioport_fuzz_qtest()
80 Size -= sizeof(a); in ioport_fuzz_qtest()
102 uint8_t offset; in pciconfig_fuzz_qos() member
111 bus->config_writeb(bus, a.devfn, a.offset, (uint8_t)a.value); in pciconfig_fuzz_qos()
114 bus->config_writew(bus, a.devfn, a.offset, (uint16_t)a.value); in pciconfig_fuzz_qos()
117 bus->config_writel(bus, a.devfn, a.offset, (uint32_t)a.value); in pciconfig_fuzz_qos()
[all …]
/openbmc/linux/drivers/acpi/
H A Dreboot.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <acpi/reboot.h>
21 devfn = PCI_DEVFN((rr->address >> 32) & 0xffff, in acpi_pci_reboot()
22 (rr->address >> 16) & 0xffff); in acpi_pci_reboot()
26 (rr->address & 0xffff), reset_value); in acpi_pci_reboot()
52 * checking the bit width and bit offset, but Windows ignores in acpi_reboot()
61 switch (rr->space_id) { in acpi_reboot()
76 * subsequent reboot mechanism. in acpi_reboot()
79 * to reboot on the affected platforms. in acpi_reboot()
/openbmc/linux/arch/mips/boot/dts/mti/
H A Dsead3.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 compatible = "mti,sead-3";
14 model = "MIPS SEAD-3";
17 stdout-path = "serial1:115200";
36 cpu_intc: interrupt-controller {
37 compatible = "mti,cpu-interrupt-controller";
[all …]
/openbmc/linux/arch/mips/boot/dts/brcm/
H A Dbcm3368.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm3368-clock.h"
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
14 mips-hpt-frequency = <150000000>;
30 periph_clk: periph-clk {
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
[all …]

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