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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Drenesas,ether.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/renesas,ether.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: ethernet-controller.yaml#
13 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
18 - items:
19 - enum:
20 - renesas,gether-r8a7740 # device is a part of R8A7740 SoC
21 - renesas,gether-r8a77980 # device is a part of R8A77980 SoC
[all …]
H A Drenesas,etheravb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
15 - items:
16 - enum:
17 - renesas,etheravb-r8a7742 # RZ/G1H
18 - renesas,etheravb-r8a7743 # RZ/G1M
19 - renesas,etheravb-r8a7744 # RZ/G1N
20 - renesas,etheravb-r8a7745 # RZ/G1E
[all …]
/openbmc/linux/drivers/phy/renesas/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PHY_R8A779F0_ETHERNET_SERDES) += r8a779f0-ether-serdes.o
3 obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o
4 obj-$(CONFIG_PHY_RCAR_GEN3_PCIE) += phy-rcar-gen3-pcie.o
5 obj-$(CONFIG_PHY_RCAR_GEN3_USB2) += phy-rcar-gen3-usb2.o
6 obj-$(CONFIG_PHY_RCAR_GEN3_USB3) += phy-rcar-gen3-usb3.o
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr8a7794.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car E2 (R8A77940) SoC
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
[all …]
H A Dr8a7793.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-N (R8A77930) SoC
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7793-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
37 compatible = "fixed-clock";
[all …]
H A Dr8a7745.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7745-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
[all …]
H A Dr8a7791.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
H A Dr8a7743.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7743-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
[all …]
H A Dr8a7742.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7742-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <0>;
[all …]
H A Dr8a7790.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
46 compatible = "fixed-clock";
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dr8a7794.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a7794-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
[all …]
H A Dr8a7793.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
8 #include <dt-bindings/clock/r8a7793-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7793-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
37 compatible = "fixed-clock";
38 #clock-cells = <0>;
[all …]
H A Dr8a7791.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
45 compatible = "fixed-clock";
[all …]
H A Dr8a7790.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
[all …]
/openbmc/u-boot/include/configs/
H A Dkoelsch.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include "rcar-gen2-common.h"
16 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
23 /* SH Ether */
H A Dgose.h1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include "rcar-gen2-common.h"
16 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
23 /* SH Ether */
H A Dlager.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include "rcar-gen2-common.h"
17 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
24 /* SH Ether */
H A Dsilk.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #include "rcar-gen2-common.h"
18 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
28 /* SH Ether */
H A Dalt.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include "rcar-gen2-common.h"
17 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
27 /* SH Ether */
H A Dporter.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #include "rcar-gen2-common.h"
18 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
28 /* SH Ether */
H A Dstout.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include "rcar-gen2-common.h"
19 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
32 /* SH Ether */
/openbmc/linux/drivers/clk/renesas/
H A Dr8a7794-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
93 DEF_MOD("2d-dmac", 115, R8A7794_CLK_ZS),
94 DEF_MOD("fdp1-0", 119, R8A7794_CLK_ZS),
109 DEF_MOD("sys-dmac1", 218, R8A7794_CLK_ZS),
110 DEF_MOD("sys-dmac0", 219, R8A7794_CLK_ZS),
[all …]
H A Dr8a7791-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Glider bvba
7 * Based on clk-rcar-gen2.c
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen2-cpg.h"
96 DEF_MOD("2d-dmac", 115, R8A7791_CLK_ZS),
97 DEF_MOD("fdp1-1", 118, R8A7791_CLK_ZS),
98 DEF_MOD("fdp1-0", 119, R8A7791_CLK_ZS),
[all …]
H A Dr8a7790-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-rcar-gen2.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen2-cpg.h"
101 DEF_MOD("2d-dmac", 115, R8A7790_CLK_ZS),
102 DEF_MOD("fdp1-2", 117, R8A7790_CLK_ZS),
103 DEF_MOD("fdp1-1", 118, R8A7790_CLK_ZS),
104 DEF_MOD("fdp1-0", 119, R8A7790_CLK_ZS),
[all …]
/openbmc/u-boot/drivers/clk/renesas/
H A Dr8a7794-cpg-mssr.c6 * Based on clk-rcar-gen2.c
16 #include <clk-uclass.h>
19 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen2-cpg.h"
95 DEF_MOD("2d-dmac", 115, R8A7794_CLK_ZS),
96 DEF_MOD("fdp1-0", 119, R8A7794_CLK_ZS),
102 DEF_MOD("vsp1-sy", 131, R8A7794_CLK_ZS),
111 DEF_MOD("sys-dmac1", 218, R8A7794_CLK_ZS),
112 DEF_MOD("sys-dmac0", 219, R8A7794_CLK_ZS),
[all …]

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