| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | gddr5.c | 24 #include "ram.h"
35 nvkm_gddr5_calc(struct nvkm_ram *ram, bool nuts) in nvkm_gddr5_calc() argument
39 int rq = ram->freq < 1000000; /* XXX */ in nvkm_gddr5_calc()
41 xd = !ram->next->bios.ramcfg_DLLoff; in nvkm_gddr5_calc()
43 switch (ram->next->bios.ramcfg_ver) { in nvkm_gddr5_calc()
45 pd = ram->next->bios.ramcfg_11_01_80; in nvkm_gddr5_calc()
46 lf = ram->next->bios.ramcfg_11_01_40; in nvkm_gddr5_calc()
47 vh = ram->next->bios.ramcfg_11_02_10; in nvkm_gddr5_calc()
48 vr = ram->next->bios.ramcfg_11_02_04; in nvkm_gddr5_calc()
49 vo = ram->next->bios.ramcfg_11_06; in nvkm_gddr5_calc()
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| H A D | ramgk104.c | 25 #include "ram.h"
143 struct gk104_ram *ram = container_of(fuc, typeof(*ram), fuc); in gk104_ram_train() local
149 for (i = 0; (data & 0x80000000) && i < ram->parts; addr += 0x1000, i++) { in gk104_ram_train()
150 if (ram->pmask & (1 << i)) in gk104_ram_train()
159 struct gk104_ram *ram = container_of(fuc, typeof(*ram), fuc); in r1373f4_init() local
160 const u32 mcoef = ((--ram->P2 << 28) | (ram->N2 << 8) | ram->M2); in r1373f4_init()
161 const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1); in r1373f4_init()
162 const u32 runk0 = ram->fN1 << 16; in r1373f4_init()
163 const u32 runk1 = ram->fN1; in r1373f4_init()
165 if (ram->from == 2) { in r1373f4_init()
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| H A D | ram.c | 25 #include "ram.h"
33 struct nvkm_ram *ram; member
41 return nvkm_instobj_wrap(nvkm_vram(memory)->ram->fb->subdev.device, memory, pmemory); in nvkm_vram_kmap()
91 mutex_lock(&vram->ram->mutex); in nvkm_vram_dtor()
94 nvkm_mm_free(&vram->ram->vram, &node); in nvkm_vram_dtor()
96 mutex_unlock(&vram->ram->mutex); in nvkm_vram_dtor()
115 struct nvkm_ram *ram; in nvkm_ram_get() local
125 if (!device->fb || !(ram = device->fb->ram)) in nvkm_ram_get()
127 ram = device->fb->ram; in nvkm_ram_get()
128 mm = &ram->vram; in nvkm_ram_get()
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| H A D | ramfuc.h | 59 ramfuc_init(struct ramfuc *ram, struct nvkm_fb *fb) in ramfuc_init() argument
61 int ret = nvkm_memx_init(fb->subdev.device->pmu, &ram->memx); in ramfuc_init()
65 ram->sequence++; in ramfuc_init()
66 ram->fb = fb; in ramfuc_init()
71 ramfuc_exec(struct ramfuc *ram, bool exec) in ramfuc_exec() argument
74 if (ram->fb) { in ramfuc_exec()
75 ret = nvkm_memx_fini(&ram->memx, exec); in ramfuc_exec()
76 ram->fb = NULL; in ramfuc_exec()
82 ramfuc_rd32(struct ramfuc *ram, struct ramfuc_reg *reg) in ramfuc_rd32() argument
84 struct nvkm_device *device = ram->fb->subdev.device; in ramfuc_rd32()
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| H A D | ramnv50.c | 25 #include "ram.h"
73 nv50_ram_timing_calc(struct nv50_ram *ram, u32 *timing) in nv50_ram_timing_calc() argument
75 struct nvbios_ramcfg *cfg = &ram->base.target.bios; in nv50_ram_timing_calc()
76 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in nv50_ram_timing_calc()
86 switch ((!T(CWL)) * ram->base.type) { in nv50_ram_timing_calc()
97 unkt3b = 0x19 + ram->base.next->bios.rammap_00_16_40; in nv50_ram_timing_calc()
99 ram->base.next->bios.rammap_00_16_40) << 16 | in nv50_ram_timing_calc()
133 if (ram->base.type == NVKM_RAM_TYPE_DDR2) { in nv50_ram_timing_calc()
137 if (ram->base.type == NVKM_RAM_TYPE_GDDR3) { in nv50_ram_timing_calc()
151 nv50_ram_timing_read(struct nv50_ram *ram, u32 *timing) in nv50_ram_timing_read() argument
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| H A D | gddr3.c | 25 #include "ram.h"
71 nvkm_gddr3_calc(struct nvkm_ram *ram) in nvkm_gddr3_calc() argument
75 switch (ram->next->bios.timing_ver) { in nvkm_gddr3_calc()
77 CWL = ram->next->bios.timing_10_CWL; in nvkm_gddr3_calc()
78 CL = ram->next->bios.timing_10_CL; in nvkm_gddr3_calc()
79 WR = ram->next->bios.timing_10_WR; in nvkm_gddr3_calc()
80 DLL = !ram->next->bios.ramcfg_DLLoff; in nvkm_gddr3_calc()
81 ODT = ram->next->bios.timing_10_ODT; in nvkm_gddr3_calc()
82 RON = ram->next->bios.ramcfg_RON; in nvkm_gddr3_calc()
85 CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; in nvkm_gddr3_calc()
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| H A D | ramgt215.c | 26 #include "ram.h"
154 gt215_link_train(struct gt215_ram *ram) in gt215_link_train() argument
156 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train()
157 struct gt215_ramfuc *fuc = &ram->fuc; in gt215_link_train()
158 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in gt215_link_train()
194 ret = ram->base.func->calc(&ram->base, (u32) M0205T.freq * 1000); in gt215_link_train()
237 ram->base.func->calc(&ram->base, clk_current); in gt215_link_train()
246 ram_train_result(ram->base.fb, result, 64); in gt215_link_train()
272 gt215_link_train_init(struct gt215_ram *ram) in gt215_link_train_init() argument
280 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train_init()
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| H A D | sddr3.c | 26 #include "ram.h"
70 nvkm_sddr3_calc(struct nvkm_ram *ram) in nvkm_sddr3_calc() argument
74 DLL = !ram->next->bios.ramcfg_DLLoff; in nvkm_sddr3_calc()
76 switch (ram->next->bios.timing_ver) { in nvkm_sddr3_calc()
78 if (ram->next->bios.timing_hdr < 0x17) { in nvkm_sddr3_calc()
82 CWL = ram->next->bios.timing_10_CWL; in nvkm_sddr3_calc()
83 CL = ram->next->bios.timing_10_CL; in nvkm_sddr3_calc()
84 WR = ram->next->bios.timing_10_WR; in nvkm_sddr3_calc()
85 ODT = ram->next->bios.timing_10_ODT; in nvkm_sddr3_calc()
88 CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; in nvkm_sddr3_calc()
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| H A D | ramgf100.c | 25 #include "ram.h"
109 struct gf100_ram *ram = container_of(fuc, typeof(*ram), fuc); in gf100_ram_train() local
110 struct nvkm_fb *fb = ram->base.fb; in gf100_ram_train()
129 struct gf100_ram *ram = gf100_ram(base); in gf100_ram_calc() local
130 struct gf100_ramfuc *fuc = &ram->fuc; in gf100_ram_calc()
131 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in gf100_ram_calc()
180 ret = ram_init(fuc, ram->base.fb); in gf100_ram_calc()
215 ret = gt215_pll_calc(subdev, &ram->refpll, ram->mempll.refclk, in gf100_ram_calc()
230 ret = gt215_pll_calc(subdev, &ram->mempll, freq, in gf100_ram_calc()
409 struct gf100_ram *ram = gf100_ram(base); in gf100_ram_prog() local
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| H A D | sddr2.c | 26 #include "ram.h"
61 nvkm_sddr2_calc(struct nvkm_ram *ram) in nvkm_sddr2_calc() argument
65 switch (ram->next->bios.timing_ver) { in nvkm_sddr2_calc()
67 CL = ram->next->bios.timing_10_CL; in nvkm_sddr2_calc()
68 WR = ram->next->bios.timing_10_WR; in nvkm_sddr2_calc()
69 DLL = !ram->next->bios.ramcfg_DLLoff; in nvkm_sddr2_calc()
70 ODT = ram->next->bios.timing_10_ODT & 3; in nvkm_sddr2_calc()
73 CL = (ram->next->bios.timing[1] & 0x0000001f); in nvkm_sddr2_calc()
74 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_sddr2_calc()
80 if (ram->next->bios.timing_ver == 0x20 || in nvkm_sddr2_calc()
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| H A D | rammcp77.c | 25 #include "ram.h"
35 struct mcp77_ram *ram = mcp77_ram(base); in mcp77_ram_init() local
36 struct nvkm_device *device = ram->base.fb->subdev.device; in mcp77_ram_init()
37 u32 dniso = ((ram->base.size - (ram->poller_base + 0x00)) >> 5) - 1; in mcp77_ram_init()
38 u32 hostnb = ((ram->base.size - (ram->poller_base + 0x20)) >> 5) - 1; in mcp77_ram_init()
39 u32 flush = ((ram->base.size - (ram->poller_base + 0x40)) >> 5) - 1; in mcp77_ram_init()
66 struct mcp77_ram *ram; in mcp77_ram_new() local
69 if (!(ram = kzalloc(sizeof(*ram), GFP_KERNEL))) in mcp77_ram_new()
71 *pram = &ram->base; in mcp77_ram_new()
74 size, &ram->base); in mcp77_ram_new()
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| H A D | ramnv40.c | 36 struct nv40_ram *ram = nv40_ram(base); in nv40_ram_calc() local
37 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in nv40_ram_calc()
53 ram->ctrl = 0x80000000 | (log2P << 16); in nv40_ram_calc()
54 ram->ctrl |= min(pll.bias_p + log2P, (int)pll.max_p) << 20; in nv40_ram_calc()
56 ram->ctrl |= 0x00000100; in nv40_ram_calc()
57 ram->coef = (N1 << 8) | M1; in nv40_ram_calc()
59 ram->ctrl |= 0x40000000; in nv40_ram_calc()
60 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_ram_calc()
69 struct nv40_ram *ram = nv40_ram(base); in nv40_ram_prog() local
70 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in nv40_ram_prog()
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| /openbmc/linux/drivers/zorro/ |
| H A D | zorro.ids | 18 0000 Golem RAM Box 2MB [RAM Expansion]
22 1300 Warp Engine [Accelerator, SCSI Host Adapter and RAM Expansion]
24 0200 Megamix 2000 [RAM Expansion]
36 0a00 A590/A2052/A2058/A2091 [RAM Expansion]
37 2000 A560 [RAM Expansion]
40 5000 A2620 68020 [Accelerator and RAM Expansion]
41 5100 A2630 68030 [Accelerator and RAM Expansion]
51 0200 EXP8000 [RAM Expansion]
64 0100 AX2000 [RAM Expansion]
68 0000 StarBoard II [RAM Expansion]
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| /openbmc/u-boot/test/lib/ |
| H A D | lmb.c | 47 * Test helper function that reserves 64 KiB somewhere in the simulated RAM and
50 static int test_multi_alloc(struct unit_test_state *uts, const phys_addr_t ram, in test_multi_alloc() argument
55 const phys_addr_t ram_end = ram + ram_size; in test_multi_alloc()
63 ut_assert(ram_end == 0 || ram_end > ram); in test_multi_alloc()
66 ut_assert(alloc_64k_addr >= ram + 8); in test_multi_alloc()
76 ret = lmb_add(&lmb, ram, ram_size); in test_multi_alloc()
83 ut_asserteq(lmb.memory.region[1].base, ram); in test_multi_alloc()
87 ut_asserteq(lmb.memory.region[0].base, ram); in test_multi_alloc()
97 /* allocate somewhere, should be at the end of RAM */ in test_multi_alloc()
161 ut_asserteq(lmb.memory.region[1].base, ram); in test_multi_alloc()
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bus/ |
| H A D | hwsq.h | 61 hwsq_init(struct hwsq *ram, struct nvkm_subdev *subdev) in hwsq_init() argument
65 ret = nvkm_hwsq_init(subdev, &ram->hwsq); in hwsq_init()
69 ram->sequence++; in hwsq_init()
70 ram->subdev = subdev; in hwsq_init()
75 hwsq_exec(struct hwsq *ram, bool exec) in hwsq_exec() argument
78 if (ram->subdev) { in hwsq_exec()
79 ret = nvkm_hwsq_fini(&ram->hwsq, exec); in hwsq_exec()
80 ram->subdev = NULL; in hwsq_exec()
86 hwsq_rd32(struct hwsq *ram, struct hwsq_reg *reg) in hwsq_rd32() argument
88 struct nvkm_device *device = ram->subdev->device; in hwsq_rd32()
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| /openbmc/u-boot/drivers/ram/ |
| H A D | Kconfig | 1 config RAM config
2 bool "Enable RAM drivers using Driver Model"
5 This allows drivers to be provided for SDRAM and other RAM
7 tree. Generally some parameters are required to set up the RAM and
8 the RAM size can either be statically defined or dynamically
12 bool "Enable RAM support in SPL"
13 depends on RAM && SPL_DM
15 The RAM subsystem adds a small amount of overhead to the image.
16 If this is acceptable and you have a need to use RAM drivers in
18 setting up RAM (e.g. SDRAM / DDR) within SPL.
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| /openbmc/linux/Documentation/admin-guide/blockdev/ |
| H A D | ramdisk.rst | 2 Using the RAM disk block device with Linux
10 4) An Example of Creating a Compressed RAM Disk
16 The RAM disk driver is a way to use main system memory as a block device. It
22 The RAM disk dynamically grows as more space is required. It does this by using
23 RAM from the buffer cache. The driver marks the buffers it is using as dirty
26 The RAM disk supports up to 16 RAM disks by default, and can be reconfigured
27 to support an unlimited number of RAM disks (at your own risk). Just change
31 To use RAM disk support with your system, run './MAKEDEV ram' from the /dev
32 directory. RAM disks are all major number 1, and start with minor number 0
35 The new RAM disk also has the ability to load compressed RAM disk images,
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| /openbmc/qemu/docs/devel/migration/ |
| H A D | mapped-ram.rst | 1 Mapped-ram
4 Mapped-ram is a new stream format for the RAM section designed to
6 with ``multifd``. This enables parallel migration of a guest's RAM to
9 The core of the feature is to ensure that RAM pages are mapped
25 ``mapped-ram`` capabilities:
29 ``migrate_set_capability mapped-ram on``
35 Mapped-ram migration is best done non-live, i.e. by stopping the VM on
45 The mapped-ram feature was designed for use cases where the migration
54 that's the ideal scenario for mapped-ram migration. Not having to
55 track dirty pages, the migration will write the RAM pages to the disk
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| /openbmc/qemu/docs/system/ |
| H A D | vm-templating.rst | 39 Supply VM RAM via memory-backend-file, with ``share=on`` (modifications go
43 In the following command-line example, a 2GB VM is created, whereby VM RAM
49 -object memory-backend-file,id=pc.ram,mem-path=template,size=2g,share=on,... \\
50 -machine q35,memory-backend=pc.ram
56 leaving the current state of VM RAM reside in the file.
59 configure VM RAM to be based on a template VM RAM file; however, the VM
62 Supply VM RAM via memory-backend-file, with ``share=off`` (modifications
73 -object memory-backend-file,id=pc.ram,mem-path=template,size=2g,readonly=on,rom=off,... \\
74 -machine q35,memory-backend=pc.ram
86 cannot be modified to discard VM RAM, or to actually share memory with
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| /openbmc/linux/include/linux/ |
| H A D | hp_sdc.h | 187 #define HP_SDC_CMD_READ_RAM 0x00 /* Load from i8042 RAM (autoinc) */
197 #define HP_SDC_CMD_READ_D0 0xf0 /* Load from i8042 RAM location 0x70 */
198 #define HP_SDC_CMD_READ_D1 0xf1 /* Load from i8042 RAM location 0x71 */
199 #define HP_SDC_CMD_READ_D2 0xf2 /* Load from i8042 RAM location 0x72 */
200 #define HP_SDC_CMD_READ_D3 0xf3 /* Load from i8042 RAM location 0x73 */
201 #define HP_SDC_CMD_READ_VT1 0xf4 /* Load from i8042 RAM location 0x74 */
202 #define HP_SDC_CMD_READ_VT2 0xf5 /* Load from i8042 RAM location 0x75 */
203 #define HP_SDC_CMD_READ_VT3 0xf6 /* Load from i8042 RAM location 0x76 */
204 #define HP_SDC_CMD_READ_VT4 0xf7 /* Load from i8042 RAM location 0x77 */
205 #define HP_SDC_CMD_READ_KBN 0xf8 /* Load from i8042 RAM location 0x78 */
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| /openbmc/u-boot/arch/arm/mach-stm32mp/ |
| H A D | dram_init.c | 8 #include <ram.h>
14 struct ram_info ram; in dram_init() local
20 debug("RAM init failed: %d\n", ret); in dram_init()
23 ret = ram_get_info(dev, &ram); in dram_init()
25 debug("Cannot get RAM size: %d\n", ret); in dram_init()
28 debug("RAM init base=%lx, size=%x\n", ram.base, ram.size); in dram_init()
30 gd->ram_size = ram.size; in dram_init()
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| /openbmc/linux/arch/m68k/atari/ |
| H A D | stram.c | 2 * Functions for ST-RAM allocations
35 * The ST-RAM allocator allocates memory from a pool of reserved ST-RAM of
36 * configurable size, set aside on ST-RAM init.
37 * As long as this pool is not exhausted, allocation of real ST-RAM can be
41 /* set if kernel is in ST-RAM */
45 .name = "ST-RAM Pool"
73 * determine whether kernel code resides in ST-RAM in atari_stram_init()
74 * (then ST-RAM is the first memory block at virtual 0x0) in atari_stram_init()
84 /* Should never come here! (There is always ST-Ram!) */ in atari_stram_init()
85 panic("atari_stram_init: no ST-RAM found!"); in atari_stram_init()
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| /openbmc/linux/Documentation/translations/zh_CN/arch/arm/ |
| H A D | Booting | 40 1、设置和初始化 RAM。
47 1、设置和初始化 RAM
53 引导装载程序应该找到并初始化系统中所有内核用于保持系统变量数据的 RAM。
55 RAM，或可能使用对这个设备已知的 RAM 信息，还可能使用任何引导装载程序
117 标签列表应该保存在系统的 RAM 中。
120 建议放在 RAM 的头 16KiB 中。
126 RAM 中，并用启动数据初始化它。dtb 格式在文档
132 dtb 必须置于内核自解压不会覆盖的内存区。建议将其放置于 RAM 的头 16KiB
146 zImage 也可以被放在系统 RAM（任意位置）中被调用。注意：内核使用映像
147 基地址的前 16KB RAM 空间来保存页表。建议将映像置于 RAM 的 32KB 处。
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| /openbmc/qemu/hw/arm/ |
| H A D | kzm.c | 32 * 0x80000000-0x8fffffff RAM EMULATED
33 * 0x90000000-0x9fffffff RAM EMULATED
81 error_report("RAM size more than %s is not supported", sz); in kzm_init()
87 machine->ram); in kzm_init()
96 } ram[2] = { in kzm_init() local
101 size = MIN(ram_size, ram[i].size); in kzm_init()
105 if (size < ram[i].size) { in kzm_init()
106 memory_region_init_alias(&s->ram_alias, NULL, "ram.alias", in kzm_init()
107 machine->ram, in kzm_init()
108 alias_offset, ram[i].size - size); in kzm_init()
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| /openbmc/u-boot/arch/arm/mach-rockchip/ |
| H A D | sdram_common.c | 8 #include <ram.h>
52 * This is workaround for issue we can't get correct size for 4GB ram in rockchip_sdram_size()
53 * in 32bit system and available before we really need ram space in rockchip_sdram_size()
54 * out of 4GB, eg.enable ARM LAPE(rk3288 supports 8GB ram). in rockchip_sdram_size()
56 * to 0 in 32bit system, and system can not get correct ram size. in rockchip_sdram_size()
59 * ram in 4GB, so we can use this directly to workaround the issue. in rockchip_sdram_size()
74 struct ram_info ram; in dram_init() local
83 ret = ram_get_info(dev, &ram); in dram_init()
88 gd->ram_size = ram.size; in dram_init()
90 (unsigned long)ram.base, (unsigned long)ram.size); in dram_init()
|