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Searched full:qxp (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/bridge/imx/
H A DKconfig27 tristate "Freescale i.MX8QM/QXP pixel combiner"
33 Freescale i.MX8qm/qxp processors.
36 tristate "Freescale i.MX8QM/QXP display pixel link"
42 Freescale i.MX8qm/qxp processors.
H A Dimx8qxp-pixel-combiner.c445 MODULE_DESCRIPTION("i.MX8QM/QXP pixel combiner bridge driver");
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dfsl,imx8qxp-ldb.yaml7 title: Freescale i.MX8qm/qxp LVDS Display Bridge
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
15 The i.MX8qm/qxp LDB is controlled by Control and Status Registers(CSR) module.
33 A side note is that i.MX8qm/qxp LDB is officially called pixel mapper in
H A Dfsl,imx8qxp-pixel-link.yaml7 title: Freescale i.MX8qm/qxp Display Pixel Link
13 The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard
21 The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU)
H A Dfsl,imx8qxp-pixel-combiner.yaml7 title: Freescale i.MX8qm/qxp Pixel Combiner
13 The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dfsl,imx8qxp-csr.yaml7 title: Freescale i.MX8qm/qxp Control and Status Registers Module
13 As a system controller, the Freescale i.MX8qm/qxp Control and Status
/openbmc/linux/drivers/media/platform/nxp/imx-jpeg/
H A DKconfig11 This is a video4linux2 driver for the i.MX8 QXP/QM integrated
H A Dmxc-jpeg.c2971 MODULE_DESCRIPTION("V4L2 driver for i.MX8 QXP/QM JPEG encoder/decoder");
/openbmc/linux/drivers/firmware/imx/
H A DKconfig21 (QM, QP), and i.MX8QX (QXP, DX).
/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dfsl,imx8qxp-pixel-link-msi-bus.yaml24 Peripherals in i.MX8qm/qxp imaging, LVDS, MIPI DSI and HDMI TX subsystems,
28 The i.MX System Controller Firmware (SCFW) owns and uses the i.MX8qm/qxp
/openbmc/u-boot/drivers/pinctrl/nxp/
H A Dpinctrl-imx.h43 /* Each pin on imx8qm/qxp consists of 2 u32 PIN_FUNC_ID and 1 u32 CONFIG */
/openbmc/linux/Documentation/devicetree/bindings/firmware/
H A Dfsl,scu.yaml16 (QM, QP), and i.MX8QX (QXP, DX).
/openbmc/u-boot/arch/arm/mach-imx/imx8/
H A Dcpu.c544 return "QXP"; in get_imx8_type()
/openbmc/linux/
H A DMAINTAINERS15403 NXP i.MX 8QXP ADC DRIVER
15412 NXP i.MX 8QXP/8QM JPEG V4L2 DRIVER