Searched full:queue0 (Results 1 – 25 of 31) sorted by relevance
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/openbmc/linux/drivers/net/wireless/broadcom/b43legacy/ |
H A D | pio.c | 146 queue = pio->queue0; in parse_cookie() 402 b43legacy_destroy_pioqueue(pio->queue0); in b43legacy_pio_free() 403 pio->queue0 = NULL; in b43legacy_pio_free() 415 pio->queue0 = queue; in b43legacy_pio_init() 447 b43legacy_destroy_pioqueue(pio->queue0); in b43legacy_pio_init() 448 pio->queue0 = NULL; in b43legacy_pio_init() 657 pio->queue0->tx_frozen = 1; in b43legacy_pio_freeze_txqueues() 669 pio->queue0->tx_frozen = 0; in b43legacy_pio_thaw_txqueues() 673 if (!list_empty(&pio->queue0->txqueue)) in b43legacy_pio_thaw_txqueues() 674 tasklet_schedule(&pio->queue0->txtask); in b43legacy_pio_thaw_txqueues()
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H A D | b43legacy.h | 538 struct b43legacy_pioqueue *queue0; member
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/openbmc/linux/Documentation/devicetree/bindings/dma/ |
H A D | fsl-qdma.txt | 17 "qdma-queue0": the block0 interrupt 48 "qdma-queue0", "qdma-queue1";
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | intel,dwmac-plat.yaml | 71 queue0 { 87 queue0 {
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H A D | snps,dwmac.yaml | 700 queue0 { 710 queue0 {
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | sa8540p-ride.dts | 200 queue0 { 230 queue0 { 277 queue0 { 307 queue0 {
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H A D | sa8775p-ride.dts | 307 queue0 { 337 queue0 { 377 queue0 { 407 queue0 {
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H A D | sa8155p-adp.dts | 350 queue0 { 362 queue0 {
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3568.dtsi | 207 queue0 {}; 212 queue0 {};
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H A D | rk3588.dtsi | 279 queue0 {}; 285 queue0 {};
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H A D | rk356x.dtsi | 700 queue0 {}; 705 queue0 {};
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H A D | rk3588s.dtsi | 1371 queue0 {}; 1377 queue0 {};
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/openbmc/linux/arch/arm/boot/dts/axis/ |
H A D | artpec6.dtsi | 321 queue0 {}; 326 queue0 {};
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/openbmc/linux/drivers/net/wireless/ath/ath5k/ |
H A D | reg.h | 567 #define AR5K_QCU_TXDP_BASE 0x0800 /* Register Address - Queue0 TXDP */ 587 #define AR5K_QCU_CBRCFG_BASE 0x08c0 /* Register Address - Queue0 CBRCFG */ 597 #define AR5K_QCU_RDYTIMECFG_BASE 0x0900 /* Register Address - Queue0 RDYTIMECFG */ 618 #define AR5K_QCU_MISC_BASE 0x09c0 /* Register Address -Queue0 MISC */ 640 #define AR5K_QCU_STS_BASE 0x0a00 /* Register Address - Queue0 STS */ 685 #define AR5K_DCU_QCUMASK_BASE 0x1000 /* Register Address -Queue0 DCU_QCUMASK */ 692 #define AR5K_DCU_LCL_IFS_BASE 0x1040 /* Register Address -Queue0 DCU_LCL_IFS */ 706 #define AR5K_DCU_RETRY_LMT_BASE 0x1080 /* Register Address -Queue0 DCU_RETRY_LMT */ 718 #define AR5K_DCU_CHAN_TIME_BASE 0x10c0 /* Register Address -Queue0 DCU_CHAN_TIME */ 736 #define AR5K_DCU_MISC_BASE 0x1100 /* Register Address -Queue0 DCU_MISC */
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rv1126.dtsi | 456 queue0 {}; 461 queue0 {};
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mp-evk.dts | 209 queue0 { 239 queue0 {
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H A D | imx8mp-verdin.dtsi | 214 queue0 { 249 queue0 {
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H A D | fsl-ls1046a.dtsi | 927 interrupt-names = "qdma-error", "qdma-queue0",
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H A D | fsl-ls1043a.dtsi | 988 interrupt-names = "qdma-error", "qdma-queue0",
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H A D | fsl-ls1028a.dtsi | 829 interrupt-names = "qdma-error", "qdma-queue0",
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt2712e.dtsi | 703 queue0 { 713 queue0 {
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H A D | mt8195.dtsi | 1294 queue0 { 1315 queue0 {
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/openbmc/linux/arch/arm/boot/dts/nxp/ls/ |
H A D | ls1021a.dtsi | 927 "qdma-queue0", "qdma-queue1";
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/openbmc/linux/drivers/dma/ |
H A D | fsl-qdma.c | 1202 fsl_qdma->irq_base = platform_get_irq_byname(pdev, "qdma-queue0"); in fsl_qdma_probe()
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_gfx.c | 178 /* Policy: use pipe1 queue0 as high priority graphics queue if we in amdgpu_gfx_is_high_priority_graphics_queue()
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