/openbmc/linux/drivers/watchdog/ |
H A D | ie6xx_wdt.c | 24 #define PV2 0x04 macro 121 outl(preload, ie6xx_wdt_data.sch_wdtba + PV2); in ie6xx_wdt_set_timeout() 185 seq_printf(s, "PV2 = 0x%08x\n", in ie6xx_wdt_show() 186 inl(ie6xx_wdt_data.sch_wdtba + PV2)); in ie6xx_wdt_show()
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | nvidia,tegra30-pinmux.yaml | 75 pu5, pu6, jtag_rtck_pu7, pv0, pv1, pv2, pv3, ddc_scl_pv4,
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra30-colibri.dtsi | 206 pv2 { 207 nvidia,pins = "pv2";
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H A D | tegra30-apalis-v1.1.dtsi | 81 pv2 { 82 nvidia,pins = "pv2";
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H A D | tegra30-apalis.dtsi | 80 pv2 { 81 nvidia,pins = "pv2";
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H A D | tegra30-asus-transformer-common.dtsi | 792 pv2 { 793 nvidia,pins = "pv2";
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H A D | tegra30-beaver.dts | 1217 pv2 { 1218 nvidia,pins = "pv2";
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H A D | tegra30-pegatron-chagall.dts | 1015 pv2 { 1016 nvidia,pins = "pv2",
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H A D | tegra124-apalis-v1.2.dtsi | 502 sdmmc3-cd-n-pv2 { /* CD# GPIO */
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H A D | tegra124-apalis.dtsi | 499 sdmmc3-cd-n-pv2 { /* CD# GPIO */
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H A D | tegra30-ouya.dts | 1409 pv2 { 1410 nvidia,pins = "pv2";
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/openbmc/linux/drivers/platform/chrome/ |
H A D | cros_ec_sensorhub_ring.c | 136 static int cros_ec_sensor_ring_median_cmp(const void *pv1, const void *pv2) in cros_ec_sensor_ring_median_cmp() argument 139 s64 v2 = *(s64 *)pv2; in cros_ec_sensor_ring_median_cmp()
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/openbmc/u-boot/arch/arm/mach-tegra/tegra30/ |
H A D | pinmux.c | 49 PIN(PV2, OWR, RSVD2, RSVD3, RSVD4),
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/openbmc/u-boot/board/nvidia/cardhu/ |
H A D | pinmux-config-cardhu.h | 125 DEFAULT_PINMUX(PV2, OWR, NORMAL, NORMAL, OUTPUT),
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/openbmc/u-boot/board/toradex/colibri_t30/ |
H A D | pinmux-config-colibri_t30.h | 126 DEFAULT_PINMUX(PV2, OWR, NORMAL, NORMAL, OUTPUT),
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/openbmc/u-boot/board/avionic-design/common/ |
H A D | pinmux-config-tamonten-ng.h | 159 DEFAULT_PINMUX(PV2, RSVD1, NORMAL, NORMAL, OUTPUT),
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/openbmc/u-boot/board/toradex/apalis_t30/ |
H A D | pinmux-config-apalis_t30.h | 128 DEFAULT_PINMUX(PV2, OWR, NORMAL, NORMAL, INPUT),
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/openbmc/linux/drivers/pinctrl/tegra/ |
H A D | pinctrl-tegra20.c | 526 /* PV2..3: Balls are named after GPIO not function */ 527 PINCTRL_PIN(TEGRA_PIN_PV2, "PV2"),
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H A D | pinctrl-tegra30.c | 462 PINCTRL_PIN(TEGRA_PIN_PV2, "PV2"), 2341 …PINGROUP(pv2, OWR, RSVD2, RSVD3, RSVD4, 0x3060, N, …
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H A D | pinctrl-tegra114.c | 320 PINCTRL_PIN(TEGRA_PIN_SDMMC3_CD_N_PV2, "SDMMC3_CD_N PV2"),
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H A D | pinctrl-tegra124.c | 351 PINCTRL_PIN(TEGRA_PIN_SDMMC3_CD_N_PV2, "SDMMC3_CD_N PV2"),
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H A D | pinctrl-tegra210.c | 296 PINCTRL_PIN(TEGRA_PIN_LCD_RST_PV2, "LCD_RST PV2"),
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/openbmc/linux/drivers/gpu/drm/vc4/ |
H A D | vc4_crtc.c | 20 * domain feeds DSI0 or DPI, while pv1 feeds DS1 or SMI. pv2 in the
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/openbmc/qemu/libdecnumber/ |
H A D | decNumber.c | 4665 const Unit *pv1, *pv2; in decDivideOp() local 4667 pv2=msu2; /* -> msu */ in decDivideOp() 4668 for (pv1=msu1; ; pv1--, pv2--) { in decDivideOp() 4671 if (pv2>=var2) v2=*pv2; /* in range */ in decDivideOp()
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