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/openbmc/openbmc/poky/meta/recipes-multimedia/pulseaudio/
H A Dpulseaudio.inc1 SUMMARY = "Sound server for Linux and Unix-like operating systems"
7 # Most of PulseAudio code is under LGPL-2.1-or-later. There are a few
10 # The "adrian" echo canceller variant has code under a non-standard permissive
11 # license. See src/modules/echo-cancel/adrian-license.txt for details. This
18 # The src/pulsecore/filter/ directory contains code under the 3-clause BSD
22 # are some dependencies to GPL libraries. LGPL code that depends on GPL
23 # libraries probably becomes effectively GPL-licensed (at compile-time? or at
24 # at link-time?). I'm not a lawyer, though, so I'm not sure of the exact
35 # module-lirc (enabled by PACKAGECONFIG[lirc]) uses LIRC.
37 # module-equalizer-sink uses FFTW. This recipe disables that, however.
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/openbmc/u-boot/arch/arm/cpu/arm926ejs/lpc32xx/
H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2011-2015 by Vladimir Zapolskiy <vz@mleia.com>
20 setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG); in reset_cpu()
22 /* To be compatible with the original U-Boot code: in reset_cpu()
23 * addr: - 0: perform hard reset. in reset_cpu()
24 * - !=0: perform a soft reset; i.e. "RESOUT_N" not asserted). */ in reset_cpu()
26 /* Reset pulse length is 13005 peripheral clock frames */ in reset_cpu()
27 writel(13000, &wdt->pulse); in reset_cpu()
31 | WDTIM_MCTRL_M_RES2, &wdt->mctrl); in reset_cpu()
34 writel(0x01, &wdt->emr); in reset_cpu()
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/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dpxa3xx_nand.h11 unsigned int tWP; /* ND_nWE pulse time */
13 unsigned int tRP; /* ND_nRE pulse width */
46 /* allow platform code to keep OBM/bootloader defined NFC config */
52 /* use an flash-based bad block table */
/openbmc/openbmc/meta-openembedded/meta-multimedia/recipes-multimedia/pipewire/
H A Dpipewire_1.4.3.bb7 LICENSE = "MIT & LGPL-2.1-or-later & GPL-2.0-only"
25 GROUPADD_PARAM:${PN} = "--system pipewire"
27 USERADD_PARAM:${PN} = "--system --home / --no-create-home \
28 --comment 'PipeWire multimedia daemon' \
29 --gid pipewire --groups audio,video \
41 # The session-managers list specifies which session managers Meson
56 -Devl=disabled \
57 -Dtests=disabled \
58 -Dudevrulesdir=${nonarch_base_libdir}/udev/rules.d/ \
59 -Dsystemd-system-unit-dir=${systemd_system_unitdir} \
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/openbmc/openbmc/poky/meta/recipes-multimedia/alsa/
H A Dalsa-plugins_1.2.12.bb5 HOMEPAGE = "http://alsa-project.org"
6 BUGTRACKER = "http://alsa-project.org/main/index.php/Bug_Tracking"
10 # The primary license of alsa-plugins is LGPL-2.1-only.
12 # m4/attributes.m4 is licensed under GPL-2.0-or-later. m4/attributes.m4 is part
15 # The samplerate plugin source code is licensed under GPL-2.0-or-later to be
18 # the terms of LGPL-2.1-only like the rest of the plugins.
19 LICENSE = "LGPL-2.1-only & GPL-2.0-or-later"
26 SRC_URI = "https://www.alsa-project.org/files/pub/plugins/${BP}.tar.bz2"
29 DEPENDS += "alsa-lib"
38 PACKAGECONFIG[aaf] = "--enable-aaf,--disable-aaf,libavtp"
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/openbmc/qemu/hw/sensor/
H A Dmax31785.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Maxim MAX31785 PMBus 6-Channel Fan Controller
75 #define MAX31785_FAN_CONFIG_PULSE(pulse) (pulse << 4) argument
76 #define MAX31785_DEFAULT_FAN_CONFIG_1_2(pulse) \ argument
77 (MAX31785_FAN_CONFIG_ENABLE | MAX31785_FAN_CONFIG_PULSE(pulse))
88 * @code: The command code received
140 * |23-254 | Reserved |
172 switch (pmdev->code) { in max31785_read_byte()
175 if (pmdev->page <= MAX31785_MAX_FAN_PAGE) { in max31785_read_byte()
176 pmbus_send8(pmdev, pmdev->pages[pmdev->page].fan_config_1_2); in max31785_read_byte()
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/openbmc/openbmc/meta-nuvoton/recipes-nuvoton/program-edid/program-edid/
H A Dedid.json8 "DPM active-off supported": true,
65 "Sync pulse": {
70 "Horizontal sync (outside of V-sync)": "Positive",
100 "Sync pulse": {
105 "Horizontal sync (outside of V-sync)": "Positive",
156 "ID Product Code": 30427,
/openbmc/docs/designs/
H A Dstate-management-and-external-interfaces.md23 [phoshor-state-manager][2] implements the xyz.openbmc_project.State.\*
28 the appropriate xyz.openbmc_project.State.\* D-Bus interface.
35 Currently phosphor-state-manager supports the following:
37 - Chassis: On/Off
38 - Host: On/Off/Reboot
60 "ForceOff": "Turn off the unit immediately (non-graceful shutdown).",
62 "ForceRestart": "Shut down immediately and non-gracefully and restart
84 …------------------------------ | -----------------------------------------------------------------…
85 …y’ management power down actions. The command does not initiate a clean shut-down of the operating…
87 …t a D5h “Request parameter(s) not supported in present state.” error completion code be returned. |
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/openbmc/qemu/docs/system/arm/
H A Dnuvoton.rst1 Nuvoton iBMC boards (``kudo-bmc``, ``mori-bmc``, ``npcm750-evb``, ``quanta-gbs-bmc``, ``quanta-gsj`…
4 The `Nuvoton iBMC`_ chips are a family of Arm-based SoCs that are
7 NPCM8XX series. NPCM7XX series feature one or two Arm Cortex-A9 CPU cores,
8 while NPCM8XX feature 4 Arm Cortex-A35 CPU cores. Both series contain a
12 .. _Nuvoton iBMC: https://www.nuvoton.com/products/cloud-computing/ibmc/
14 The NPCM750 SoC has two Cortex-A9 cores and is targeted for the Enterprise
17 - ``npcm750-evb`` Nuvoton NPCM750 Evaluation board
19 The NPCM730 SoC has two Cortex-A9 cores and is targeted for Data Center and
22 - ``quanta-gbs-bmc`` Quanta GBS server BMC
23 - ``quanta-gsj`` Quanta GSJ server BMC
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/openbmc/u-boot/include/
H A Dspd.h1 /* SPDX-License-Identifier: GPL-2.0+ */
38 unsigned char clk_cycle2; /* 23 Min SDRAM Cycle time at CL=X-1 */
39 unsigned char clk_access2; /* 24 SDRAM Access from Clock at CL=X-1 */
40 unsigned char clk_cycle3; /* 25 Min SDRAM Cycle time at CL=X-2 */
41 unsigned char clk_access3; /* 26 Max Access from Clock at CL=X-2 */
45 unsigned char tras; /* 30 Minimum RAS Pulse Width (tRAS) */
62 unsigned char res[15]; /* 47-xx IDD in SPD and Reserved space */
63 unsigned char spd_rev; /* 62 SPD Data Revision Code */
64 unsigned char cksum; /* 63 Checksum for bytes 0-62 */
65 unsigned char mid[8]; /* 64 Mfr's JEDEC ID code per JEP-108E */
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H A Dddr_spd.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2008-2014 Freescale Semiconductor, Inc.
10 * Format from "JEDEC Standard No. 21-C,
37 unsigned char clk_cycle2; /* 23 Min SDRAM Cycle time @ CL=X-0.5 */
39 Clk @ CL=X-0.5 (tAC) */
40 unsigned char clk_cycle3; /* 25 Min SDRAM Cycle time @ CL=X-1 */
41 unsigned char clk_access3; /* 26 Max Access from Clk @ CL=X-1 (tAC) */
45 unsigned char tras; /* 30 Minimum RAS Pulse Width (tRAS) */
51 unsigned char res_36_40[5];/* 36-40 reserved for VCSDRAM */
59 unsigned char res_48_61[14]; /* 48-61 Reserved */
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/openbmc/u-boot/board/pandora/
H A Dpandora.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
7 * Richard Woodruff <r-woodruff2@ti.com>
12 * (C) Copyright 2004-2008
25 #include <asm/mach-types.h>
58 gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA; in board_init()
60 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
90 /* set up dual-voltage GPIOs to 1.8V */ in misc_init_r()
91 pbias_lite = readl(&t2_base->pbias_lite); in misc_init_r()
94 writel(pbias_lite, &t2_base->pbias_lite); in misc_init_r()
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/openbmc/openbmc/poky/documentation/migration-guides/
H A Dmigration-3.2.rst1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK
9 .. _migration-3.2-minimum-system-requirements:
12 ---------------------------
16 :term:`buildtools-extended` tarball (easily installable using
17 ``scripts/install-buildtools``).
20 .. _migration-3.2-removed-recipes:
23 ---------------
27 - ``bjam-native``: replaced by ``boost-build-native``
28 - ``avahi-ui``: folded into the main ``avahi`` recipe --- the GTK UI can be disabled using :term:`P…
29 - ``build-compare``: no longer needed with the removal of the ``packagefeed-stability`` class
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/openbmc/u-boot/drivers/watchdog/
H A Dcdns_wdt.c1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence WDT driver - Used by Xilinx Zynq
18 u32 zmr; /* WD Zero mode register, offset - 0x0 */
19 u32 ccr; /* Counter Control Register offset - 0x4 */
20 u32 restart; /* Restart key register, offset - 0x8 */
21 u32 status; /* Status Register, offset - 0xC */
32 /* Supports 1 - 516 sec */
62 * Zero Mode Register - This register controls how the time out is indicated
63 * and also contains the access code to allow writes to the register (0xABC).
68 #define CDNS_WDT_ZMR_RSTLEN_16 0x00000030 /* Reset pulse of 16 pclk cycles */
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/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/templates/
H A Dcustomrecipe.html44 <!-- Delete recipe modal -->
45 <div id="delete-recipe-modal" class="modal fade" tabindex="-1" role="dialog" aria-labelledby="myMod…
46 <div class="modal-dialog">
47 <div class="modal-content">
48 <div class="modal-body">
52 <div class="modal-footer">
53 <button type="button" class="btn btn-primary" id="delete-custom-recipe-confirmed">
54 <span data-role="submit-state">Delete custom image</span>
55 <span data-role="loading-state" style="display:none">
56 <span class="fa-pulse">
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/openbmc/qemu/hw/i2c/
H A Dbitbang_i2c.c2 * Bit-Bang i2c emulation extracted from
7 * This code is licensed under the GNU GPL v2.
9 * Contributions after 2012-01-13 are licensed under the terms of the
51 trace_bitbang_i2c_state(sname[i2c->state], sname[state]); in bitbang_i2c_set_state()
52 i2c->state = state; in bitbang_i2c_set_state()
57 if (i2c->current_addr >= 0) in bitbang_i2c_enter_stop()
58 i2c_end_transfer(i2c->bus); in bitbang_i2c_enter_stop()
59 i2c->current_addr = -1; in bitbang_i2c_enter_stop()
66 trace_bitbang_i2c_data(i2c->last_clock, i2c->last_data, in bitbang_i2c_ret()
67 i2c->device_out, level); in bitbang_i2c_ret()
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/openbmc/u-boot/board/ti/evm/
H A Devm.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2004-2011
9 * Derived from Beagle Board and 3430 SDP code by
10 * Richard Woodruff <r-woodruff2@ti.com>
25 #include <asm/mach-types.h>
35 #include <asm/ehci-omap.h>
105 gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM; in board_init()
107 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); in board_init()
115 /* break into full u-boot on 'c' */ in spl_start_uboot()
126 * Description: If we use SPL then there is no x-loader nor config header
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/openbmc/qemu/hw/input/
H A Dpckbd.c26 #include "qemu/error-report.h"
36 #include "hw/qdev-properties.h"
79 /* Pulse bits 3-0 of the output port P2. */
81 /* Pulse bit 0 of the output port P2 = CPU reset. */
83 /* Pulse no bits of the output port P2. */
119 /* Scan code conversion to PC format */
161 if (s->status & KBD_STAT_OBF) { in kbd_update_irq_lines()
162 if (s->status & KBD_STAT_MOUSE_OBF) { in kbd_update_irq_lines()
163 if (s->mode & KBD_MODE_MOUSE_INT) { in kbd_update_irq_lines()
167 if ((s->mode & KBD_MODE_KBD_INT) && in kbd_update_irq_lines()
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/openbmc/qemu/hw/block/
H A Dtrace-events7 # fdc-sysbus.c
8 fdctrl_tc_pulse(int level) "TC pulse: %u"
30 …uint64_t start, int width2, uint64_t end) "%s: start sector erase at: 0x%0*" PRIx64 "-0x%0*" PRIx64
47 # virtio-blk.c
61 # hd-geometry.c
65 # xen-block.c
82 …int8_t prev, uint8_t data) "[%p] programming zero to one! addr=0x%"PRIx32" 0x%"PRIx8" -> 0x%"PRIx8
86 m25p80_populated_jedec(void *s) "[%p] populated jedec code"
95 m25p80_binding_no_bdrv(void *s) "[%p] No BDRV - binding to RAM"
/openbmc/u-boot/arch/arm/dts/
H A Dulcb.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car Gen3 ULCB board
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
13 model = "Renesas R-Car Gen3 ULCB board";
21 stdout-path = "serial0:115200n8";
24 audio_clkout: audio-clkout {
27 * but needed to avoid cs2000/rcar_sound probe dead-lock
29 compatible = "fixed-clock";
30 #clock-cells = <0>;
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/openbmc/u-boot/board/theadorable/
H A Dtheadorable.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de>
21 #include "../arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.h"
44 #define REBOOT_DELAY 1000 /* reboot-delay in ms */
64 * DO NOT Modify - Open Mbus Window - 2G - Mbus is required for the
68 {0x00020184, 0x3fffffe0}, /* Close fast path Window to - 2G */
96 {"theadorable_1333-667", 0x3, 0x5, 0x0, A0, ddr3_theadorable, NULL},
102 * Lane0 - PCIE0.0 X1 (to WIFI Module)
103 * Lane5 - SATA0
104 * Lane6 - SATA1
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/openbmc/u-boot/board/overo/
H A Dovero.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
6 * Richard Woodruff <r-woodruff2@ti.com>
11 * (C) Copyright 2004-2008
26 #include <asm/mach-types.h>
31 #include <asm/ehci-omap.h>
105 sdio_direct = -1; in get_sdio2_config()
265 printf("Recognized Ettus Research USRP-E (rev %d %s)\n", in misc_init_r()
291 env_set("boardname", "overo-storm"); in misc_init_r()
305 /*CONFIG7- computed as params */
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/openbmc/u-boot/board/siemens/taurus/
H A Dtaurus.c1 // SPDX-License-Identifier: GPL-2.0+
7 * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
9 * (C) Copyright 2007-2008
54 csa = readl(&matrix->ebicsa); in taurus_nand_hw_init()
56 writel(csa, &matrix->ebicsa); in taurus_nand_hw_init()
61 &smc->cs[3].setup); in taurus_nand_hw_init()
64 &smc->cs[3].pulse); in taurus_nand_hw_init()
66 &smc->cs[3].cycle); in taurus_nand_hw_init()
71 &smc->cs[3].mode); in taurus_nand_hw_init()
89 writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE)) in matrix_init()
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/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/static/css/
H A Ddefault.css4 body { padding-top: 50px; }
7 img.logo { height: 30px; vertical-align: bottom; }
10 .toaster-navbar-brand { float: left; margin: 7px 25px 0 0; }
11 .toaster-navbar-brand a.brand { color: #777; height: 50px; padding: 15px 5px 15px 15px; font-size: …
12 .toaster-navbar-brand > a { text-decoration: none; }
13 .toaster-navbar-brand > a.brand:hover { color: #5e5e5e; }
16 .glyphicon-info-sign { color: #777; font-size: 16px; }
17 .glyphicon-info-sign:hover { color: #999; cursor: pointer; }
19 /* Override the negative right margin for the navbar-right class */
20 #new-project-button { margin-right: 0; }
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/openbmc/openbmc/poky/bitbake/lib/bb/tests/fetch-testdata/apple/cups/
H A Dreleases10 <meta charset="utf-8">
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21 …-7mtunHqp/Bw0ND9akjJME8XCh0WPm3HAXOSeX7skL0qGAhpdfzkQvYcujYcwNPTpWKeKMFUGZGtvnEkcczFgwQ==" rel="st…
22 …-CmoegizWCUR1jC94Y2eukVQIFxJ9GxYerz9q7dBwImLlx8ODwYkXAMIhCfTnA45Ep6++rcO/ZtKVLvFBM8dapA==" rel="st…
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