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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-38x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6810-pinctrl", "marvell,88f6820-pinctrl" or
8 "marvell,88f6828-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
32 mpp14 14 gpio, ge0(rxd2), ptp(clk), dram(vttctrl), spi0(cs3), dev(we1), pcie3(clkreq)
35 mpp17 17 gpio, ge0(rxclk), ptp(clk), ua1(rxd), spi0(sck), sata1(prsnt), sata0(prsnt)
36 mpp18 18 gpio, ge0(rxerr), ptp(trig), ua1(txd), spi0(cs0)
37 mpp19 19 gpio, ge0(col), ptp(evreq), ge0(txerr), sata1(prsnt), ua0(cts)
38 mpp20 20 gpio, ge0(txclk), ptp(clk), sata0(prsnt), ua0(rts)
53 mpp35 35 gpio, ref(clk_out1), dev(a1)
[all …]
H A Dmarvell,armada-xp-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl",
8 "marvell,mv78460-pinctrl"
9 - reg: register specifier of MPP registers
39 mpp18 18 gpio, ge0(rxerr), ge1(rxd0), lcd(d18), ptp(trig)
40 mpp19 19 gpio, ge0(crs), ge1(rxd1), lcd(d19), ptp(evreq)
41 mpp20 20 gpio, ge0(rxd4), ge1(rxd2), lcd(d20), ptp(clk)
48 mpp27 27 gpio, lcd(e), tdm(dtx), ptp(trig)
49 mpp28 28 gpio, lcd(pwm), tdm(drx), ptp(evreq)
50 mpp29 29 gpio, lcd(ref-clk), tdm(int0), ptp(clk)
[all …]
H A Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
26 mpp8 8 gpio, dev(ad10), ptp(trig)
27 mpp9 9 gpio, dev(ad11), ptp(clk)
28 mpp10 10 gpio, dev(ad12), ptp(evreq)
54 mpp35 35 gpio, ref(clk), dev(a1)
57 mpp38 38 gpio, ref(clk), sd0(d0), dev(ad4), ge(rxd1)
65 mpp45 45 gpio, ref(clk), pcie0(rstout), ua1(rxd)
[all …]
H A Dmarvell,armada-375-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6720-pinctrl"
8 - reg: register specifier of MPP registers
18 mpp2 2 gpio, dev(ad4), ptp(evreq), led(c0), audio(sdi)
19 mpp3 3 gpio, dev(ad5), ptp(trig), led(p3), audio(mclk)
23 mpp7 7 gpio, dev(ad1), ptp(clk), led(p2), audio(extclk)
48 mpp32 32 gpio, ge1(txd2), spi1(sck), ptp(trig)
55 mpp39 39 gpio, ref(clkout)
79 mpp63 63 gpio, ptp(trig), led(p2), dev(burst/last)
82 mpp66 66 gpio, ptp(evreq), spi1(cs3)
H A Dmarvell,ac5-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/marvell,ac5-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Packham <chris.packham@alliedtelesis.co.nz>
13 Bindings for Marvell's AC5 memory-mapped pin controller.
18 - const: marvell,ac5-pinctrl
24 '-pins$':
26 $ref: pinmux-node.yaml#
31 $ref: /schemas/types.yaml#/definitions/string
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmscc,vsc7514-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/mscc,vsc7514-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
18 packets using CPU. Additionally, PTP is supported as well as FDMA for faster
22 - if:
25 const: mscc,vsc7514-switch
[all …]
H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
[all …]
H A Dfsl,fman-dtsec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Madalin Bucur <madalin.bucur@nxp.com>
15 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller
22 - fsl,fman-dtsec
23 - fsl,fman-xgec
24 - fsl,fman-memac
26 cell-index:
[all …]
H A Dnvidia,tegra234-mgbe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra234 MGBE Multi-Gigabit Ethernet Controller
10 - Thierry Reding <treding@nvidia.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra234-mgbe
20 reg-names:
22 - const: hypervisor
[all …]
H A Dmicrochip,lan966x-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces.
20 pattern: "^switch@[0-9a-f]+$"
[all …]
H A Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Wei Fang <wei.fang@nxp.com>
12 - NXP Linux Team <linux-imx@nxp.com>
15 - $ref: ethernet-controller.yaml#
20 - enum:
21 - fsl,imx25-fec
22 - fsl,imx27-fec
[all …]
H A Dmicrochip,sparx5-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
14 The SparX-5 Enterprise Ethernet switch family provides a rich set of
15 Enterprise switching features such as advanced TCAM-based VLAN and
17 security through TCAM-based frame processing using versatile content
25 forwarding (uRPF) tasks. Additional L3 features include VRF-Lite and
[all …]
H A Dstarfive,jh7110-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Emil Renner Berthing <kernel@esmil.dk>
12 - Samin Guo <samin.guo@starfivetech.com>
19 - starfive,jh7110-dwmac
21 - compatible
26 - enum:
27 - starfive,jh7110-dwmac
[all …]
H A Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
26 - compatible
29 - $ref: snps,dwmac.yaml#
[all …]
H A Dsocfpga-dwmac.txt9 - compatible : For Cyclone5/Arria5 SoCs it should contain
10 "altr,socfpga-stmmac". For Arria10/Agilex/Stratix10 SoCs
11 "altr,socfpga-stmmac-a10-s10".
14 - altr,sysmgr-syscon : Should be the phandle to the system manager node that
20 - altr,f2h_ptp_ref_clk use f2h_ptp_ref_clk instead of default eosc1 clock
21 for ptp ref clk. This affects all emacs as the clock is common.
24 altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if
26 phy-mode: The phy mode the ethernet operates in
27 altr,sgmii-to-sgmii-converter: phandle to the TSE SGMII converter
32 - compatible : Should be altr,gmii-to-sgmii-2.0
[all …]
/openbmc/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_ptp.c1 // SPDX-License-Identifier: GPL-2.0+
7 * https://github.com/microchip-ung/sparx-5_reginfo
32 * (1/1000000)/((2^-59)/X) in sparx5_ptp_get_1ppm()
37 switch (sparx5->coreclock) { in sparx5_ptp_get_1ppm()
59 switch (sparx5->coreclock) { in sparx5_ptp_get_nominal_value()
81 struct sparx5 *sparx5 = port->sparx5; in sparx5_ptp_hwtstamp_set()
84 /* For now don't allow to run ptp on ports that are part of a bridge, in sparx5_ptp_hwtstamp_set()
89 if (test_bit(port->portno, sparx5->bridge_mask)) in sparx5_ptp_hwtstamp_set()
90 return -EINVAL; in sparx5_ptp_hwtstamp_set()
92 switch (cfg->tx_type) { in sparx5_ptp_hwtstamp_set()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/dsa/
H A Dhirschmann,hellcreek.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Andrew Lunn <andrew@lunn.ch>
14 - Florian Fainelli <f.fainelli@gmail.com>
15 - Vladimir Oltean <olteanv@gmail.com>
16 - Kurt Kanzenbach <kurt@linutronix.de>
26 - const: hirschmann,hellcreek-de1soc-r1
30 The physical base address and size of TSN and PTP memory base
[all …]
/openbmc/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_ptp.c1 // SPDX-License-Identifier: GPL-2.0+
12 * The value is calculated as following: (1/1000000)/((2^-59)/6.037735849)
23 /* This represents the base rule ID for the PTP rules that are added in the
57 struct lan966x *lan966x = port->lan966x; in lan966x_ptp_add_trap()
61 vrule = vcap_get_rule(lan966x->vcap_ctrl, rule_id); in lan966x_ptp_add_trap()
68 mask &= ~BIT(port->chip_port); in lan966x_ptp_add_trap()
76 vrule = vcap_alloc_rule(lan966x->vcap_ctrl, port->dev, in lan966x_ptp_add_trap()
103 struct lan966x *lan966x = port->lan966x; in lan966x_ptp_del_trap()
108 vrule = vcap_get_rule(lan966x->vcap_ctrl, rule_id); in lan966x_ptp_del_trap()
110 return -EEXIST; in lan966x_ptp_del_trap()
[all …]
/openbmc/linux/drivers/ptp/
H A Dptp_clockmatrix.c1 // SPDX-License-Identifier: GPL-2.0+
3 * PTP hardware clock driver for the IDT ClockMatrix(TM) family of timing and
27 MODULE_AUTHOR("IDT support-1588 <IDT-support-1588@lm.renesas.com>");
33 * over-rides any automatic selection
49 return regmap_bulk_read(idtcm->regmap, module + regaddr, buf, count); in idtcm_read()
58 return regmap_bulk_write(idtcm->regmap, module + regaddr, buf, count); in idtcm_write()
64 struct idtcm_fwrc *rec = (struct idtcm_fwrc *)fw->data; in contains_full_configuration()
65 u16 scratch = IDTCM_FW_REG(idtcm->fw_ver, V520, SCRATCH); in contains_full_configuration()
73 full_count = (scratch - GPIO_USER_CONTROL) - in contains_full_configuration()
74 ((scratch >> 7) - (GPIO_USER_CONTROL >> 7)) * 4; in contains_full_configuration()
[all …]
H A Dptp_idt82p33.c1 // SPDX-License-Identifier: GPL-2.0
25 MODULE_AUTHOR("IDT support-1588 <IDT-support-1588@lm.renesas.com>");
46 return regmap_bulk_read(idt82p33->regmap, regaddr, buf, count); in idt82p33_read()
52 return regmap_bulk_write(idt82p33->regmap, regaddr, buf, count); in idt82p33_write()
65 nsec |= buf[2 - i]; in idt82p33_byte_array_to_timespec()
71 sec |= buf[8 - i]; in idt82p33_byte_array_to_timespec()
74 ts->tv_sec = sec; in idt82p33_byte_array_to_timespec()
75 ts->tv_nsec = nsec; in idt82p33_byte_array_to_timespec()
85 nsec = ts->tv_nsec; in idt82p33_timespec_to_byte_array()
86 sec = ts->tv_sec; in idt82p33_timespec_to_byte_array()
[all …]
/openbmc/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-38x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
94 MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
116 MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
124 MPP_VAR_FUNCTION(2, "ptp", "trig", V_88F6810_PLUS),
130 MPP_VAR_FUNCTION(2, "ptp", "evreq", V_88F6810_PLUS),
138 MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
215 MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6810_PLUS),
219 MPP_VAR_FUNCTION(1, "ptp", "trig", V_88F6810_PLUS),
[all …]
H A Dpinctrl-armada-375.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
36 MPP_FUNCTION(0x2, "ptp", "evreq"),
44 MPP_FUNCTION(0x2, "ptp", "trig"),
71 MPP_FUNCTION(0x2, "ptp", "clk"),
192 MPP_FUNCTION(0x6, "ptp", "evreq")),
202 MPP_FUNCTION(0x4, "ptp", "trig"),
235 MPP_FUNCTION(0x4, "ref", "clkout"),
249 MPP_FUNCTION(0x6, "ptp", "clk")),
[all …]
H A Dpinctrl-armada-39x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
18 #include "pinctrl-mvebu.h"
62 MPP_VAR_FUNCTION(7, "ptp", "trig", V_88F6920_PLUS)),
66 MPP_VAR_FUNCTION(7, "ptp", "clk", V_88F6920_PLUS)),
70 MPP_VAR_FUNCTION(7, "ptp", "evreq", V_88F6920_PLUS)),
198 MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6920_PLUS),
210 MPP_VAR_FUNCTION(3, "ref", "clk_out0", V_88F6920_PLUS),
258 MPP_VAR_FUNCTION(1, "ref", "clk_out0", V_88F6920_PLUS),
263 MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6920_PLUS),
[all …]
/openbmc/linux/Documentation/driver-api/
H A Dindex.rst1 .. SPDX-License-Identifier: GPL-2.0
12 .. class:: toc-title
19 driver-model/index
23 early-userspace/index
26 device-io
27 dma-buf
30 message-based
33 frame-buffer
63 s390-drivers
66 uio-howto
[all …]
/openbmc/linux/Documentation/translations/zh_CN/driver-api/
H A Dindex.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/driver-api/index.rst
20 .. class:: toc-title
32 * driver-model/index
36 * early-userspace/index
39 * device-io
40 * dma-buf
43 * message-based
46 * frame-buffer
[all …]

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