Home
last modified time | relevance | path

Searched full:polarities (Results 1 – 25 of 82) sorted by relevance

1234

/openbmc/linux/include/media/
H A Dv4l2-dv-timings.h146 * @polarities: the horizontal and vertical polarities (same as struct
147 * v4l2_bt_timings polarities).
158 u32 polarities, bool interlaced,
168 * @polarities: the horizontal and vertical polarities (same as struct
169 * v4l2_bt_timings polarities).
184 unsigned int vsync, u32 polarities, bool interlaced,
/openbmc/linux/drivers/media/v4l2-core/
H A Dv4l2-dv-timings.c276 t1->bt.polarities == t2->bt.polarities && in v4l2_match_dv_timings()
327 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
331 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
336 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-", in v4l2_print_dv_timings()
481 * @polarities - the horizontal and vertical polarities (same as struct
482 * v4l2_bt_timings polarities).
495 u32 polarities, in v4l2_detect_cvt() argument
510 if (polarities == V4L2_DV_VSYNC_POS_POL) in v4l2_detect_cvt()
512 else if (polarities == V4L2_DV_HSYNC_POS_POL) in v4l2_detect_cvt()
632 t.bt.polarities = polarities; in v4l2_detect_cvt()
[all …]
H A Dv4l2-fwnode.c189 rval = fwnode_property_count_u32(fwnode, "lane-polarities"); in v4l2_fwnode_endpoint_parse_csi2_bus()
192 pr_warn("invalid number of lane-polarities entries (need %u, got %u)\n", in v4l2_fwnode_endpoint_parse_csi2_bus()
242 "lane-polarities", array, in v4l2_fwnode_endpoint_parse_csi2_bus()
251 pr_debug("no lane polarities defined, assuming not inverted\n"); in v4l2_fwnode_endpoint_parse_csi2_bus()
/openbmc/linux/drivers/gpu/drm/arm/
H A Dhdlcd_crtc.c132 unsigned int polarities, err; in hdlcd_crtc_mode_set_nofb() local
141 polarities = HDLCD_POLARITY_DATAEN | HDLCD_POLARITY_DATA; in hdlcd_crtc_mode_set_nofb()
144 polarities |= HDLCD_POLARITY_HSYNC; in hdlcd_crtc_mode_set_nofb()
146 polarities |= HDLCD_POLARITY_VSYNC; in hdlcd_crtc_mode_set_nofb()
160 hdlcd_write(hdlcd, HDLCD_REG_POLARITIES, polarities); in hdlcd_crtc_mode_set_nofb()
H A Dhdlcd_regs.h55 /* polarities */
/openbmc/linux/drivers/media/i2c/
H A Dst-mipid02.c436 bool *polarities = ep->bus.mipi_csi2.lane_polarities; in mipid02_configure_clk_lane() local
443 bridge->r.clk_lane_reg1 |= (polarities[0] << 1) | CLK_ENABLE; in mipid02_configure_clk_lane()
449 bool are_lanes_swap, bool *polarities) in mipid02_configure_data0_lane() argument
451 bool are_pin_swap = are_lanes_swap ? polarities[2] : polarities[1]; in mipid02_configure_data0_lane()
468 bool are_lanes_swap, bool *polarities) in mipid02_configure_data1_lane() argument
470 bool are_pin_swap = are_lanes_swap ? polarities[1] : polarities[2]; in mipid02_configure_data1_lane()
486 bool *polarities = ep->bus.mipi_csi2.lane_polarities; in mipid02_configure_from_rx() local
495 polarities); in mipid02_configure_from_rx()
500 polarities); in mipid02_configure_from_rx()
H A Dst-vgxy61.c1502 int polarities[VGXY61_NB_POLARITIES] = {0, 0, 0, 0, 0}; in vgxy61_tx_from_ep() local
1517 /* Build log2phy, phy2log and polarities from ep info */ in vgxy61_tx_from_ep()
1536 polarities[l] = ep.bus.mipi_csi2.lane_polarities[l]; in vgxy61_tx_from_ep()
1542 sensor->oif_ctrl = (polarities[4] << 15) + ((phy2log[4] - 1) << 13) + in vgxy61_tx_from_ep()
1543 (polarities[3] << 12) + ((phy2log[3] - 1) << 10) + in vgxy61_tx_from_ep()
1544 (polarities[2] << 9) + ((phy2log[2] - 1) << 7) + in vgxy61_tx_from_ep()
1545 (polarities[1] << 6) + ((phy2log[1] - 1) << 4) + in vgxy61_tx_from_ep()
1546 (polarities[0] << 3) + in vgxy61_tx_from_ep()
1554 dev_dbg(&client->dev, "polarity[%d] = %d\n", i, polarities[i]); in vgxy61_tx_from_ep()
H A Dths7303.c294 "timings: %dx%d%s%d (%dx%d). Pix freq. = %d Hz. Polarities = 0x%x\n", in ths7303_log_status()
300 (int)bt->pixelclock, bt->polarities); in ths7303_log_status()
H A Dths8200.c336 if (bt->polarities & V4L2_DV_HSYNC_POS_POL) { in ths8200_setup()
340 if (bt->polarities & V4L2_DV_VSYNC_POS_POL) { in ths8200_setup()
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dvideo-interfaces.yaml125 that if HSYNC and VSYNC polarities are not specified, embedded
198 lane-polarities:
205 An array of polarities of the lanes starting from the clock lane and
209 lane-polarities property is omitted, the value must be interpreted as 0
H A Drenesas,vin.yaml88 If both HSYNC and VSYNC polarities are not specified, embedded
94 If both HSYNC and VSYNC polarities are not specified, embedded
137 If both HSYNC and VSYNC polarities are not specified, embedded
143 If both HSYNC and VSYNC polarities are not specified, embedded
H A Dti,omap3isp.txt48 lane-polarities : lane polarity (required on CSI-2)
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dti,sn65dsi86.yaml134 lane-polarities:
143 lane-polarities: [data-lanes]
267 lane-polarities = <0 1 0 1>;
H A Dsamsung,mipi-dsim.yaml125 lane-polarities:
133 lane-polarities: [data-lanes]
/openbmc/linux/Documentation/devicetree/bindings/media/i2c/
H A Dst,st-mipid02.yaml70 lane-polarities:
94 lane-polarities:
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779a0-falcon-csi-dsi.dtsi134 lane-polarities = <0 0 0 0 1>;
156 lane-polarities = <0 0 0 0 1>;
/openbmc/linux/arch/sh/include/asm/
H A Dsh7760fb.h145 * HSYNC/VSYNC polarities are derived from the fb_var_screeninfo
146 * data above; however the polarities of the following signals
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Ddv-timings.rst20 width and height, signal polarities, frontporches, backporches, sync
H A Dvidioc-g-dv-timings.rst108 - ``polarities``
109 - This is a bit mask that defines polarities of sync signals. bit 0
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-n9.dts56 lane-polarities = <1 1 1>;
/openbmc/linux/drivers/media/platform/aspeed/
H A Daspeed-video.c854 video->detected_timings.polarities &= in aspeed_video_check_and_set_polarity()
858 video->detected_timings.polarities |= in aspeed_video_check_and_set_polarity()
864 video->detected_timings.polarities &= in aspeed_video_check_and_set_polarity()
868 video->detected_timings.polarities |= in aspeed_video_check_and_set_polarity()
1000 det->polarities &= ~V4L2_DV_VSYNC_POS_POL; in aspeed_video_get_timings()
1002 det->polarities |= V4L2_DV_VSYNC_POS_POL; in aspeed_video_get_timings()
1004 det->polarities &= ~V4L2_DV_HSYNC_POS_POL; in aspeed_video_get_timings()
1006 det->polarities |= V4L2_DV_HSYNC_POS_POL; in aspeed_video_get_timings()
1008 if (det->polarities & V4L2_DV_VSYNC_POS_POL) { in aspeed_video_get_timings()
1018 if (det->polarities & V4L2_DV_HSYNC_POS_POL) { in aspeed_video_get_timings()
/openbmc/u-boot/drivers/spi/
H A Dbcm63xx_hsspi.c190 /* restore cs polarities */ in bcm63xx_hsspi_deactivate_cs()
392 /* read default cs polarities */ in bcm63xx_hsspi_probe()
/openbmc/linux/drivers/video/fbdev/geode/
H A Dvideo_gx.c266 /* Only change the sync polarities if we are running in gx_configure_display()
267 * in CRT mode. The FP polarities will be handled in in gx_configure_display()
H A Dvideo_cs5530.c124 /* Sync polarities. */ in cs5530_configure_display()
/openbmc/linux/drivers/spi/
H A Dspi-bcm63xx-hsspi.c560 /* only change actual polarities if there is no transfer */ in bcm63xx_hsspi_setup()
600 * e. At the end restore the polarities again to their default values. in bcm63xx_hsspi_do_dummy_cs_txrx()
836 /* read out default CS polarities */ in bcm63xx_hsspi_probe()

1234