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Searched full:pm_ctrl (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/arch/powerpc/platforms/cell/
H A Dpmu.c84 u32 pm_ctrl; in cbe_write_phys_ctr() local
93 pm_ctrl = cbe_read_pm(cpu, pm_control); in cbe_write_phys_ctr()
94 if (pm_ctrl & CBE_PM_ENABLE_PERF_MON) { in cbe_write_phys_ctr()
99 cbe_write_pm(cpu, pm_control, pm_ctrl); in cbe_write_phys_ctr()
261 u32 pm_ctrl, size = 0; in cbe_get_ctr_size() local
264 pm_ctrl = cbe_read_pm(cpu, pm_control); in cbe_get_ctr_size()
265 size = (pm_ctrl & CBE_PM_16BIT_CTR(phys_ctr)) ? 16 : 32; in cbe_get_ctr_size()
274 u32 pm_ctrl; in cbe_set_ctr_size() local
277 pm_ctrl = cbe_read_pm(cpu, pm_control); in cbe_set_ctr_size()
280 pm_ctrl |= CBE_PM_16BIT_CTR(phys_ctr); in cbe_set_ctr_size()
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/openbmc/linux/arch/arm/mach-omap2/
H A Dprm44xx.c48 .pm_ctrl = OMAP4_PRM_IO_PMCTRL_OFFSET,
61 unsigned long pm_ctrl; member
317 omap4_prcm_irq_setup.pm_ctrl); in omap44xx_prm_reconfigure_io_chain()
320 omap4_prcm_irq_setup.pm_ctrl) & in omap44xx_prm_reconfigure_io_chain()
330 omap4_prcm_irq_setup.pm_ctrl); in omap44xx_prm_reconfigure_io_chain()
333 omap4_prcm_irq_setup.pm_ctrl) & in omap44xx_prm_reconfigure_io_chain()
361 omap4_prcm_irq_setup.pm_ctrl); in omap44xx_prm_enable_io_wakeup()
754 omap_prm_context.pm_ctrl = in prm_save_context()
756 omap4_prcm_irq_setup.pm_ctrl); in prm_save_context()
765 omap4_prm_write_inst_reg(omap_prm_context.pm_ctrl, in prm_restore_context()
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H A Dprcm-common.h478 * @pm_ctrl: PRM register offset for the PRM_IO_PMCTRL register
501 u16 pm_ctrl; member
/openbmc/linux/drivers/soc/bcm/brcmstb/pm/
H A Dpm.h33 /* PM_CTRL bitfield (Method #0) */
42 /* PM_CTRL bitfield (Method #1) */
/openbmc/linux/drivers/net/usb/
H A Dsmsc95xx.c273 ret = smsc95xx_read_reg(dev, PM_CTRL, &val); in smsc95xx_mdiobus_reset()
279 ret = smsc95xx_write_reg(dev, PM_CTRL, val); in smsc95xx_mdiobus_reset()
1319 ret = smsc95xx_read_reg(dev, PM_CTRL, &val); in smsc95xx_enter_suspend0()
1326 ret = smsc95xx_write_reg(dev, PM_CTRL, val); in smsc95xx_enter_suspend0()
1338 ret = smsc95xx_write_reg(dev, PM_CTRL, val); in smsc95xx_enter_suspend0()
1342 /* read back PM_CTRL */ in smsc95xx_enter_suspend0()
1343 ret = smsc95xx_read_reg(dev, PM_CTRL, &val); in smsc95xx_enter_suspend0()
1375 ret = smsc95xx_read_reg(dev, PM_CTRL, &val); in smsc95xx_enter_suspend1()
1382 ret = smsc95xx_write_reg(dev, PM_CTRL, val); in smsc95xx_enter_suspend1()
1390 ret = smsc95xx_write_reg(dev, PM_CTRL, val); in smsc95xx_enter_suspend1()
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H A Dsmsc95xx.h97 #define PM_CTRL (0x20) macro
/openbmc/linux/drivers/ps3/
H A Dps3-lpm.c511 u32 pm_ctrl; in ps3_get_ctr_size() local
519 pm_ctrl = ps3_read_pm(cpu, pm_control); in ps3_get_ctr_size()
520 return (pm_ctrl & CBE_PM_16BIT_CTR(phys_ctr)) ? 16 : 32; in ps3_get_ctr_size()
530 u32 pm_ctrl; in ps3_set_ctr_size() local
538 pm_ctrl = ps3_read_pm(cpu, pm_control); in ps3_set_ctr_size()
542 pm_ctrl |= CBE_PM_16BIT_CTR(phys_ctr); in ps3_set_ctr_size()
543 ps3_write_pm(cpu, pm_control, pm_ctrl); in ps3_set_ctr_size()
547 pm_ctrl &= ~CBE_PM_16BIT_CTR(phys_ctr); in ps3_set_ctr_size()
548 ps3_write_pm(cpu, pm_control, pm_ctrl); in ps3_set_ctr_size()
/openbmc/u-boot/arch/arm/dts/
H A Dhi6220.dtsi159 pm_ctrl: pm_ctrl@f7032000 { label
/openbmc/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dhi6220-domain-ctrl.yaml63 pm_ctrl@f7032000 {
/openbmc/linux/drivers/staging/media/ipu3/
H A Dipu3-css.c203 u32 pm_ctrl, state, val; in imgu_css_set_powerup() local
225 pm_ctrl = readl(base + IMGU_REG_PM_CTRL); in imgu_css_set_powerup()
228 dev_dbg(dev, "CSS pm_ctrl 0x%x state 0x%x (power %s)\n", in imgu_css_set_powerup()
229 pm_ctrl, state, state & IMGU_STATE_POWER_DOWN ? "down" : "up"); in imgu_css_set_powerup()
249 pm_ctrl = readl(base + IMGU_REG_PM_CTRL); in imgu_css_set_powerup()
250 val = pm_ctrl & ~(IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF); in imgu_css_set_powerup()
278 val = readl(base + IMGU_REG_PM_CTRL); /* get pm_ctrl */ in imgu_css_set_powerup()
280 val |= pm_ctrl & (IMGU_PM_CTRL_CSS_PWRDN | IMGU_PM_CTRL_RST_AT_EOF); in imgu_css_set_powerup()
/openbmc/u-boot/drivers/usb/eth/
H A Dsmsc95xx.c50 #define PM_CTRL 0x20 macro
505 ret = smsc95xx_write_reg(udev, PM_CTRL, write_buf); in smsc95xx_init_common()
511 ret = smsc95xx_read_reg(udev, PM_CTRL, &read_buf); in smsc95xx_init_common()
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220.dtsi284 pm_ctrl: pm_ctrl@f7032000 { label
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
H A Dreg.h272 #define PM_CTRL 0x0502 macro